Even if we are using older kernels that do not accept the batch in the
first slot, we can simplify our code by creating the batch with itself
in the first slot and moving it to the end on execbuf submission.
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 70 ++++++++++++---------------
1 file changed, 31 insertions(+), 39 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 5f9639cd4d..7f5f240597 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -156,10 +156,8 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch,
}
batch->map_next = batch->map;
- if (batch->use_exec_lut) {
- add_exec_bo(batch, batch->bo);
- assert(batch->bo->index == 0);
- }
+ add_exec_bo(batch, batch->bo);
+ assert(batch->bo->index == 0);
batch->reserved_space = BATCH_RESERVED;
batch->state_batch_offset = batch->bo->size;
@@ -671,18 +669,19 @@ do_flush_locked(struct brw_context *brw, int in_fence_fd,
int *out_fence_fd)
if (batch->needs_sol_reset)
flags |= I915_EXEC_GEN7_SOL_RESET;
- unsigned int index;
+ struct drm_i915_gem_exec_object2 *exec = &batch->exec_objects[0];
+ assert(exec->handle == batch->bo->gem_handle);
+ exec->relocation_count = batch->reloc_count;
+ exec->relocs_ptr = (uintptr_t) batch->relocs;
if (batch->use_exec_lut) {
flags |= I915_EXEC_BATCH_FIRST | I915_EXEC_HANDLE_LUT;
- index = 0;
} else {
- index = add_exec_bo(batch, batch->bo);
+ struct drm_i915_gem_exec_object2 tmp = *exec;
+ unsigned int index = batch->exec_count - 1;
+ *exec = batch->exec_objects[index];
+ batch->exec_objects[index] = tmp;
}
- struct drm_i915_gem_exec_object2 *exec = &batch->exec_objects[index];
- exec->relocation_count = batch->reloc_count;
- exec->relocs_ptr = (uintptr_t) batch->relocs;
-
if (ret == 0) {
uint32_t hw_ctx = batch->ring == RENDER_RING ? brw->hw_ctx : 0;
@@ -811,46 +810,39 @@ __brw_emit_reloc(struct intel_batchbuffer *batch,
uint32_t batch_offset,
assert(batch_offset <= BATCH_SZ - sizeof(uint32_t));
assert(_mesa_bitcount(write_domain) <= 1);
- uint64_t offset64;
- unsigned int index;
- if (target != batch->bo) {
- index = add_exec_bo(batch, target);
- struct drm_i915_gem_exec_object2 *exec = &batch->exec_objects[index];
-
- if (write_domain) {
- exec->flags |= EXEC_OBJECT_WRITE;
-
- /* PIPECONTROL needs a w/a on gen6 */
- if (write_domain == I915_GEM_DOMAIN_INSTRUCTION) {
- struct brw_context *brw = container_of(batch, brw, batch);
- if (brw->gen == 6)
- exec->flags |= EXEC_OBJECT_NEEDS_GTT;
- }
- }
-
- offset64 = exec->offset;
- } else {
- offset64 = target->offset64;
- index = target->index;
- }
-
struct drm_i915_gem_relocation_entry *reloc =
&batch->relocs[batch->reloc_count];
- batch->reloc_count++;
-
reloc->offset = batch_offset;
reloc->delta = target_offset;
- reloc->target_handle = batch->use_exec_lut ? index : target->gem_handle;
reloc->read_domains = read_domains;
reloc->write_domain = write_domain;
- reloc->presumed_offset = offset64;
+
+ unsigned int index = add_exec_bo(batch, target);
+ struct drm_i915_gem_exec_object2 *exec = &batch->exec_objects[index];
+
+ if (write_domain) {
+ exec->flags |= EXEC_OBJECT_WRITE;
+
+ /* PIPECONTROL needs a w/a on gen6 */
+ if (write_domain == I915_GEM_DOMAIN_INSTRUCTION) {
+ struct brw_context *brw = container_of(batch, brw, batch);
+ if (brw->gen == 6)
+ exec->flags |= EXEC_OBJECT_NEEDS_GTT;
+ }
+ }
+
+ reloc->target_handle = batch->use_exec_lut ? index : target->gem_handle;
+ reloc->presumed_offset = exec->offset;
+ target_offset += exec->offset;
+
+ batch->reloc_count++;
/* Using the old buffer offset, write in what the right data would be, in
* case the buffer doesn't move and we can short-circuit the relocation
* processing in the kernel
*/
- return offset64 + target_offset;
+ return target_offset;
}
void
--
2.13.3
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