On 09/06/2017 09:56 AM, Alex Smith wrote:
Nice! I wondered if it would be possible to do something like this. This will be useful :)

Should be. :)

There is more to do, like dumping the descriptors, etc, but it's a start.


On 5 September 2017 at 20:17, Samuel Pitoiset <samuel.pitoi...@gmail.com <mailto:samuel.pitoi...@gmail.com>> wrote:

    Only the ASM is currently dumped.

    Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com
    <mailto:samuel.pitoi...@gmail.com>>
    ---
      src/amd/vulkan/radv_debug.c | 58
    +++++++++++++++++++++++++++++++++++++++++----
      1 file changed, 53 insertions(+), 5 deletions(-)

    diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c
    index a1c0a61997..f2339dfe71 100644
    --- a/src/amd/vulkan/radv_debug.c
    +++ b/src/amd/vulkan/radv_debug.c
    @@ -68,13 +68,49 @@ radv_dump_trace(struct radv_device *device,
    struct radeon_winsys_cs *cs)
             fclose(f);
      }

    +static void
    +radv_dump_gfx_shaders(struct radv_pipeline *pipeline)
    +{
    +       unsigned mask;
    +
    +       mask = pipeline->active_stages;
    +       while (mask) {
    +               struct radv_shader_variant *variant;
    +               int stage = u_bit_scan(&mask);
    +
    +               variant = pipeline->shaders[stage];
    +               assert(variant);
    +
    +               fprintf(stderr, "%s:\n%s\n\n",
    +                       radv_get_shader_name(variant, stage),
    +                       variant->binary.disasm_string);
    +       }
    +}


Will this also work for compute shaders on the GFX queue? From quick grepping it doesn't look like active_stages ever gets compute set in it, just graphics stages.

Not yet. I will probably improve this in a separate series.

Samuel.

Alex

    +
    +static struct radv_pipeline *
    +radv_get_bound_pipeline(struct radv_device *device)
    +{
    +       uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
    +
    +       return (struct radv_pipeline *)ptr[1];
    +}
    +
    +static void
    +radv_dump_gfx_state(struct radv_device *device)
    +{
    +       struct radv_pipeline *pipeline;
    +
    +       pipeline = radv_get_bound_pipeline(device);
    +       if (!pipeline)
    +               return;
    +
    +       radv_dump_gfx_shaders(pipeline);
    +}
    +
      static bool
    -radv_gpu_hang_occured(struct radv_queue *queue)
    +radv_gpu_hang_occured(struct radv_queue *queue, enum ring_type ring)
      {
             struct radeon_winsys *ws = queue->device->ws;
    -       enum ring_type ring;
    -
    -       ring = radv_queue_family_to_ring(queue->queue_family_index);

             if (!ws->ctx_wait_idle(queue->hw_ctx, ring, queue->queue_idx))
                     return true;
    @@ -86,9 +122,12 @@ void
      radv_check_gpu_hangs(struct radv_queue *queue, struct
    radeon_winsys_cs *cs)
      {
             struct radv_device *device = queue->device;
    +       enum ring_type ring;
             uint64_t addr;

    -       if (!radv_gpu_hang_occured(queue))
    +       ring = radv_queue_family_to_ring(queue->queue_family_index);
    +
    +       if (!radv_gpu_hang_occured(queue, ring))
                     return;

             if
    (ac_vm_fault_occured(device->physical_device->rad_info.chip_class,
    @@ -97,6 +136,15 @@ radv_check_gpu_hangs(struct radv_queue *queue,
    struct radeon_winsys_cs *cs)
                     fprintf(stderr, "Failing VM page:
    0x%08"PRIx64"\n\n", addr);
             }

    +       switch (ring) {
    +       case RING_GFX:
    +               radv_dump_gfx_state(device);
    +               break;
    +       default:
    +               assert(0);
    +               break;
    +       }
    +
             radv_dump_trace(queue->device, cs);
             abort();
      }
    --
    2.14.1

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On 5 September 2017 at 20:17, Samuel Pitoiset <samuel.pitoi...@gmail.com <mailto:samuel.pitoi...@gmail.com>> wrote:

    Only the ASM is currently dumped.

    Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com
    <mailto:samuel.pitoi...@gmail.com>>
    ---
      src/amd/vulkan/radv_debug.c | 58
    +++++++++++++++++++++++++++++++++++++++++----
      1 file changed, 53 insertions(+), 5 deletions(-)

    diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c
    index a1c0a61997..f2339dfe71 100644
    --- a/src/amd/vulkan/radv_debug.c
    +++ b/src/amd/vulkan/radv_debug.c
    @@ -68,13 +68,49 @@ radv_dump_trace(struct radv_device *device,
    struct radeon_winsys_cs *cs)
             fclose(f);
      }

    +static void
    +radv_dump_gfx_shaders(struct radv_pipeline *pipeline)
    +{
    +       unsigned mask;
    +
    +       mask = pipeline->active_stages;
    +       while (mask) {
    +               struct radv_shader_variant *variant;
    +               int stage = u_bit_scan(&mask);
    +
    +               variant = pipeline->shaders[stage];
    +               assert(variant);
    +
    +               fprintf(stderr, "%s:\n%s\n\n",
    +                       radv_get_shader_name(variant, stage),
    +                       variant->binary.disasm_string);
    +       }
    +}
    +
    +static struct radv_pipeline *
    +radv_get_bound_pipeline(struct radv_device *device)
    +{
    +       uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
    +
    +       return (struct radv_pipeline *)ptr[1];
    +}
    +
    +static void
    +radv_dump_gfx_state(struct radv_device *device)
    +{
    +       struct radv_pipeline *pipeline;
    +
    +       pipeline = radv_get_bound_pipeline(device);
    +       if (!pipeline)
    +               return;
    +
    +       radv_dump_gfx_shaders(pipeline);
    +}
    +
      static bool
    -radv_gpu_hang_occured(struct radv_queue *queue)
    +radv_gpu_hang_occured(struct radv_queue *queue, enum ring_type ring)
      {
             struct radeon_winsys *ws = queue->device->ws;
    -       enum ring_type ring;
    -
    -       ring = radv_queue_family_to_ring(queue->queue_family_index);

             if (!ws->ctx_wait_idle(queue->hw_ctx, ring, queue->queue_idx))
                     return true;
    @@ -86,9 +122,12 @@ void
      radv_check_gpu_hangs(struct radv_queue *queue, struct
    radeon_winsys_cs *cs)
      {
             struct radv_device *device = queue->device;
    +       enum ring_type ring;
             uint64_t addr;

    -       if (!radv_gpu_hang_occured(queue))
    +       ring = radv_queue_family_to_ring(queue->queue_family_index);
    +
    +       if (!radv_gpu_hang_occured(queue, ring))
                     return;

             if
    (ac_vm_fault_occured(device->physical_device->rad_info.chip_class,
    @@ -97,6 +136,15 @@ radv_check_gpu_hangs(struct radv_queue *queue,
    struct radeon_winsys_cs *cs)
                     fprintf(stderr, "Failing VM page:
    0x%08"PRIx64"\n\n", addr);
             }

    +       switch (ring) {
    +       case RING_GFX:
    +               radv_dump_gfx_state(device);
    +               break;
    +       default:
    +               assert(0);
    +               break;
    +       }
    +
             radv_dump_trace(queue->device, cs);
             abort();
      }
    --
    2.14.1

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