IIRC if we wait using SURFACE_SYNC other waits in other rings seemed
to sometimes get insanely long, almost like it got stuck behind it.
However, the shader waits don't have this issue.

On Thu, Nov 9, 2017 at 8:00 PM, Marek Olšák <mar...@gmail.com> wrote:
> What high priority interactions?
>
> Marek
>
> On Thu, Nov 9, 2017 at 6:22 PM, Bas Nieuwenhuizen
> <b...@basnieuwenhuizen.nl> wrote:
>> Nack. We had that and Andres removed it due to high priority interactions.
>>
>>
>> On 9 Nov 2017 18:01, "Samuel Pitoiset" <samuel.pitoi...@gmail.com> wrote:
>>
>> Copied from RadeonSI.
>>
>> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
>> ---
>>  src/amd/vulkan/si_cmd_buffer.c | 18 ++++++++++++------
>>  1 file changed, 12 insertions(+), 6 deletions(-)
>>
>> diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
>> index 89ee399817..f5c04c07a8 100644
>> --- a/src/amd/vulkan/si_cmd_buffer.c
>> +++ b/src/amd/vulkan/si_cmd_buffer.c
>> @@ -973,12 +973,18 @@ si_cs_emit_cache_flush(struct radeon_winsys_cs *cs,
>>                 radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_DB_META) |
>> EVENT_INDEX(0));
>>         }
>>
>> -       if (flush_bits & RADV_CMD_FLAG_PS_PARTIAL_FLUSH) {
>> -               radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
>> -               radeon_emit(cs, EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) |
>> EVENT_INDEX(4));
>> -       } else if (flush_bits & RADV_CMD_FLAG_VS_PARTIAL_FLUSH) {
>> -               radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
>> -               radeon_emit(cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) |
>> EVENT_INDEX(4));
>> +       /* Wait for shader engines to go idle.
>> +        * VS and PS waits are unnecessary if SURFACE_SYNC is going to wait
>> +        * for everything including CB/DB cache flushes.
>> +        */
>> +       if (!flush_cb_db) {
>> +               if (flush_bits & RADV_CMD_FLAG_PS_PARTIAL_FLUSH) {
>> +                       radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
>> +                       radeon_emit(cs,
>> EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) | EVENT_INDEX(4));
>> +               } else if (flush_bits & RADV_CMD_FLAG_VS_PARTIAL_FLUSH) {
>> +                       radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
>> +                       radeon_emit(cs,
>> EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
>> +               }
>>         }
>>
>>         if (flush_bits & RADV_CMD_FLAG_CS_PARTIAL_FLUSH) {
>> --
>> 2.15.0
>>
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>>
>>
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