Quoting kevin.rogo...@intel.com (2017-12-13 10:18:38) > From: Kevin Rogovin <kevin.rogo...@intel.com> > > v2: > Comments indicating that brw_bo_padding_is_good() will do the required > waiting for GPU commands to finish > > Signed-off-by: Kevin Rogovin <kevin.rogo...@intel.com> > --- > src/mesa/drivers/dri/i965/intel_batchbuffer.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c > b/src/mesa/drivers/dri/i965/intel_batchbuffer.c > index 91a6506a89..689ae2362a 100644 > --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c > +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c > @@ -758,6 +758,7 @@ execbuffer(int fd, > }; > > unsigned long cmd = DRM_IOCTL_I915_GEM_EXECBUFFER2; > + bool detected_out_of_bounds_write = false; > > if (in_fence != -1) { > execbuf.rsvd2 = in_fence; > @@ -787,6 +788,24 @@ execbuffer(int fd, > batch->validation_list[i].offset); > bo->gtt_offset = batch->validation_list[i].offset; > } > + > + if (unlikely(INTEL_DEBUG & DEBUG_OUT_OF_BOUND_CHK)) { > + /* brw_bo_padding_is_good() performs the necessary > + * syncing itself to make sure that the padding read > + * is correct. > + */
Actually that's not strictly true. Since you only do a pread here, it will only synchronize against the last declared write to the bo. There's no guaranteed sync with the last batch for a set of read-only bo. Similarly, because of no domain tracking, it won't also ensure that the bo is cache coherent before the read back. -Chris _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev