From: Kevin Rogovin <kevin.rogo...@intel.com> Signed-off-by: Kevin Rogovin <kevin.rogo...@intel.com> --- src/mesa/drivers/dri/i965/brw_draw.c | 16 ++++++++++++++-- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 +++++ 2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 7e29dcf..2d3fb75 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -376,6 +376,8 @@ intel_disable_rb_aux_buffer(struct brw_context *brw, * * Resolve the depth buffer's HiZ buffer, resolve the depth buffer of each * enabled depth texture, and flush the render cache for any dirty textures. + * In addition, if the ASTC5x5 workaround is needed and if ASTC5x5 textures + * are present, resolve textures so that auxilary buffers are not needed. */ void brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering) @@ -413,9 +415,13 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering) num_layers = INTEL_REMAINING_LAYERS; } - const bool disable_aux = rendering && + const bool astc_disables_aux = (brw->astc5x5_wa.required && + brw->astc5x5_wa.texture_astc5x5_present && + tex_obj->mt->aux_usage != ISL_AUX_USAGE_NONE); + + const bool disable_aux = (rendering && intel_disable_rb_aux_buffer(brw, tex_obj->mt, min_level, num_levels, - "for sampling"); + "for sampling")) || astc_disables_aux; intel_miptree_prepare_texture(brw, tex_obj->mt, view_format, min_level, num_levels, @@ -684,6 +690,12 @@ brw_prepare_drawing(struct gl_context *ctx, brw_predraw_resolve_inputs(brw, true); brw_predraw_resolve_framebuffer(brw); + /* if necessary, perform astc5x5 workarounds to make sure sampling + * from astc5x5 and textures with an auxilary surface have a command + * streamer stall and texture invalidate between them. + */ + gen9_astc5x5_perform_wa(brw); + /* Bind all inputs, derive varying and size information: */ brw_merge_inputs(brw, arrays); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index adf60a8..ccdb537 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -447,6 +447,11 @@ brw_aux_surface_disabled(const struct brw_context *brw, { const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; + if (brw->astc5x5_wa.required && + brw->astc5x5_wa.texture_astc5x5_present) { + return true; + } + for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { const struct intel_renderbuffer *irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev