Am 11.01.2018 um 03:28 schrieb Dave Airlie:
> On 11 January 2018 at 12:19, Roland Scheidegger <srol...@vmware.com> wrote:
>> Am 10.01.2018 um 07:48 schrieb Dave Airlie:
>>> From: Dave Airlie <airl...@redhat.com>
>>>
>>> This stops them being optimised out.
>>> ---
>>> src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 5 ++++-
>>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
>>> b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
>>> index ae92a767b4..de3984f596 100644
>>> --- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
>>> +++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
>>> @@ -149,11 +149,14 @@ int bc_parser::parse_decls() {
>>> }
>>> }
>>>
>>> - if (sh->target == TARGET_VS || sh->target == TARGET_ES || sh->target
>>> == TARGET_HS)
>>> + if (sh->target == TARGET_VS || sh->target == TARGET_ES || sh->target
>>> == TARGET_HS || sh->target == TARGET_LS)
>>> sh->add_input(0, 1, 0x0F);
>>> else if (sh->target == TARGET_GS) {
>>> sh->add_input(0, 1, 0x0F);
>>> sh->add_input(1, 1, 0x0F);
>>> + } else if (sh->target == TARGET_COMPUTE) {
>>> + sh->add_input(0, 1, 0x0F);
>>> + sh->add_input(1, 1, 0x0F);
>> For compute, won't you never get here because the !pshader clause
>> above will catch it?
>> By the looks of it, !pshader clause would catch both fetch and compute
>> shaders, and add add 2 preloaded regs, albeit for fetch shader I have no
>> idea why it would reserve 2 (I think should be same as vs, just 1).
>
> That path is for OpenCL shaders I'm pretty sure for GLSL compute shaders
> we definitely should be hitting this path.
Ah I see (albeit still doesn't make sense to me that fetch shaders would
also reserve 2 regs just like cl compute shaders).
Reviewed-by: Roland Scheidegger <srol...@vmware.com>
Roland
> Dave.
>
>>
>> But otherwise looks good.
>> For 0,1,2
>> Reviewed-by: Roland Scheidegger <srol...@vmware.com>
>>
>>> }
>>>
>>> bool ps_interp = ctx.hw_class >= HW_CLASS_EVERGREEN
>>>
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