For patches 2, 5-9, Reviewed-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
Sam
On 12/01/18 23:56, Ian Romanick wrote:
> From: Ian Romanick <ian.d.roman...@intel.com>
>
> And delete the resulting dead code.
>
> Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_context.h | 1 -
> src/mesa/drivers/dri/i965/genX_state_upload.c | 3 +-
> src/mesa/drivers/dri/i965/intel_state.c | 41
> ---------------------------
> 3 files changed, 1 insertion(+), 44 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 0f0aad8..afea537 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1465,7 +1465,6 @@ extern void intelInitExtensions(struct gl_context *ctx);
> extern int intel_translate_shadow_compare_func(GLenum func);
> extern int intel_translate_compare_func(GLenum func);
> extern int intel_translate_stencil_op(GLenum op);
> -extern int intel_translate_logic_op(GLenum opcode);
>
> /* brw_sync.c */
> void brw_init_syncobj_functions(struct dd_function_table *functions);
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
> b/src/mesa/drivers/dri/i965/genX_state_upload.c
> index 50ac5bc..aa4d64d 100644
> --- a/src/mesa/drivers/dri/i965/genX_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> @@ -2819,8 +2819,7 @@ set_blend_entry_bits(struct brw_context *brw,
> BLEND_ENTRY_GENXML *entry, int i,
> _mesa_enum_to_string(rb_type));
> if (GEN_GEN >= 8 || rb_type == GL_UNSIGNED_NORMALIZED) {
> entry->LogicOpEnable = true;
> - entry->LogicOpFunction =
> - intel_translate_logic_op(ctx->Color.LogicOp);
> + entry->LogicOpFunction = ctx->Color._LogicOp;
> }
> } else if (blend_enabled && !ctx->Color._AdvancedBlendMode
> && (GEN_GEN <= 5 || !integer)) {
> diff --git a/src/mesa/drivers/dri/i965/intel_state.c
> b/src/mesa/drivers/dri/i965/intel_state.c
> index 5001a49..3d477df 100644
> --- a/src/mesa/drivers/dri/i965/intel_state.c
> +++ b/src/mesa/drivers/dri/i965/intel_state.c
> @@ -117,44 +117,3 @@ intel_translate_stencil_op(GLenum op)
> return BRW_STENCILOP_ZERO;
> }
> }
> -
> -int
> -intel_translate_logic_op(GLenum opcode)
> -{
> - switch (opcode) {
> - case GL_CLEAR:
> - return BRW_LOGICOPFUNCTION_CLEAR;
> - case GL_AND:
> - return BRW_LOGICOPFUNCTION_AND;
> - case GL_AND_REVERSE:
> - return BRW_LOGICOPFUNCTION_AND_REVERSE;
> - case GL_COPY:
> - return BRW_LOGICOPFUNCTION_COPY;
> - case GL_COPY_INVERTED:
> - return BRW_LOGICOPFUNCTION_COPY_INVERTED;
> - case GL_AND_INVERTED:
> - return BRW_LOGICOPFUNCTION_AND_INVERTED;
> - case GL_NOOP:
> - return BRW_LOGICOPFUNCTION_NOOP;
> - case GL_XOR:
> - return BRW_LOGICOPFUNCTION_XOR;
> - case GL_OR:
> - return BRW_LOGICOPFUNCTION_OR;
> - case GL_OR_INVERTED:
> - return BRW_LOGICOPFUNCTION_OR_INVERTED;
> - case GL_NOR:
> - return BRW_LOGICOPFUNCTION_NOR;
> - case GL_EQUIV:
> - return BRW_LOGICOPFUNCTION_EQUIV;
> - case GL_INVERT:
> - return BRW_LOGICOPFUNCTION_INVERT;
> - case GL_OR_REVERSE:
> - return BRW_LOGICOPFUNCTION_OR_REVERSE;
> - case GL_NAND:
> - return BRW_LOGICOPFUNCTION_NAND;
> - case GL_SET:
> - return BRW_LOGICOPFUNCTION_SET;
> - default:
> - return BRW_LOGICOPFUNCTION_SET;
> - }
> -}
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