On Tuesday, 2018-03-20 13:39:25 -0700, Scott D Phillips wrote:
> When building intel_tiled_memcpy for i686, the stack will only be
> 4-byte aligned. This isn't sufficient for SSE temporaries which
> require 16-byte alignment. Use the force_align_arg_pointer
> function attribute in that case to ensure sufficient alignment.
> ---
> src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> index 69306828d72..bd8bafbd2d7 100644
> --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> +++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> @@ -42,6 +42,12 @@
> #include <emmintrin.h>
> #endif
>
> +#if defined(__GNUC__) && defined(__i386__) && (defined(__SSSE3__) ||
> defined(__SSE2__))
Is that a typo? s/SSSE3/SSE3/ ?
> +#define REALIGN __attribute__((force_align_arg_pointer))
> +#else
> +#define REALIGN
> +#endif
> +
> #define FILE_DEBUG_FLAG DEBUG_TEXTURE
>
> #define ALIGN_DOWN(a, b) ROUND_DOWN_TO(a, b)
> @@ -156,7 +162,7 @@ rgba8_copy_16_aligned_src(void *dst, const void *src)
> /**
> * Copy RGBA to BGRA - swap R and B, with the destination 16-byte aligned.
> */
> -static inline void *
> +static REALIGN inline void *
> rgba8_copy_aligned_dst(void *dst, const void *src, size_t bytes)
> {
> assert(bytes == 0 || !(((uintptr_t)dst) & 0xf));
> --
> 2.14.3
>
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