On Mon, Apr 9, 2018 at 10:23 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > For nv50 we coalesce the srcs and defs into a single node (some ops > can't take a separate src and dst, while others can only handle one reg > in the short encoding mode). > > [Side-note: the ops for which there is an encoding that can take a src > should instead use the RA's register preference facility.]
For posterity, turns out that I was mistaken. All the tex ops apparently can only take a single register, even when it's a wide encoding (LTDST vs LTSRC in envydis, but both reference the same bitfield). I'm going to reword the description accordingly. > > Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > index 3a0e56e1385..f5ce1b4a0b0 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > @@ -2216,6 +2216,16 @@ > RegAlloc::InsertConstraintsPass::texConstraintNV50(TexInstruction *tex) > for (c = 0; tex->srcExists(c) || tex->defExists(c); ++c) { > if (!tex->srcExists(c)) > tex->setSrc(c, new_LValue(func, tex->getSrc(0)->asLValue())); > + else if (tex->getSrc(c)->refCount() > 1) { > + // Disconnect source from the single definition since it's about to > + // get merged with the defs (due to JOIN_MASK_TEX). > + LValue *lval = new_LValue(func, FILE_GPR); > + Instruction *mov = new_Instruction(func, OP_MOV, TYPE_U32); > + mov->setSrc(0, tex->getSrc(c)); > + mov->setDef(0, lval); > + tex->bb->insertBefore(tex, mov); > + tex->setSrc(c, lval); > + } > if (!tex->defExists(c)) > tex->setDef(c, new_LValue(func, tex->getDef(0)->asLValue())); > } > -- > 2.16.1 > _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev