On Mon, May 07, 2018 at 12:49:33PM -0700, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/gen6_depth_state.c | 34
> ++++++++++++++--------------
> src/mesa/drivers/dri/i965/gen7_misc_state.c | 32 +++++++++++++-------------
> src/mesa/drivers/dri/i965/gen8_depth_state.c | 28 +++++++++++------------
> 3 files changed, 47 insertions(+), 47 deletions(-)
I have locally re-ordered blorp packets in order to ease comparison of state
dumps between blorp and non-blorp paths. Thanks for doing this properly.
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
>
> diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c
> b/src/mesa/drivers/dri/i965/gen6_depth_state.c
> index 8a1d580..bca956e 100644
> --- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
> +++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
> @@ -155,44 +155,44 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
> * failure to do so causes hangs on gen5 and a stall on gen6.
> */
>
> - /* Emit hiz buffer. */
> - if (hiz) {
> - assert(depth_mt);
> + /* Emit stencil buffer. */
> + if (separate_stencil) {
> + assert(stencil_mt->format == MESA_FORMAT_S_UINT8);
> + assert(stencil_mt->surf.size > 0);
>
> uint32_t offset;
> - isl_surf_get_image_offset_B_tile_sa(&depth_mt->aux_buf->surf,
> + isl_surf_get_image_offset_B_tile_sa(&stencil_mt->surf,
> lod, 0, 0, &offset, NULL, NULL);
>
> BEGIN_BATCH(3);
> - OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2));
> - OUT_BATCH(depth_mt->aux_buf->surf.row_pitch - 1);
> - OUT_RELOC(depth_mt->aux_buf->bo, RELOC_WRITE, offset);
> + OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2));
> + OUT_BATCH(stencil_mt->surf.row_pitch - 1);
> + OUT_RELOC(stencil_mt->bo, RELOC_WRITE, offset);
> ADVANCE_BATCH();
> } else {
> BEGIN_BATCH(3);
> - OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2));
> + OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2));
> OUT_BATCH(0);
> OUT_BATCH(0);
> ADVANCE_BATCH();
> }
>
> - /* Emit stencil buffer. */
> - if (separate_stencil) {
> - assert(stencil_mt->format == MESA_FORMAT_S_UINT8);
> - assert(stencil_mt->surf.size > 0);
> + /* Emit hiz buffer. */
> + if (hiz) {
> + assert(depth_mt);
>
> uint32_t offset;
> - isl_surf_get_image_offset_B_tile_sa(&stencil_mt->surf,
> + isl_surf_get_image_offset_B_tile_sa(&depth_mt->aux_buf->surf,
> lod, 0, 0, &offset, NULL, NULL);
>
> BEGIN_BATCH(3);
> - OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2));
> - OUT_BATCH(stencil_mt->surf.row_pitch - 1);
> - OUT_RELOC(stencil_mt->bo, RELOC_WRITE, offset);
> + OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2));
> + OUT_BATCH(depth_mt->aux_buf->surf.row_pitch - 1);
> + OUT_RELOC(depth_mt->aux_buf->bo, RELOC_WRITE, offset);
> ADVANCE_BATCH();
> } else {
> BEGIN_BATCH(3);
> - OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2));
> + OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2));
> OUT_BATCH(0);
> OUT_BATCH(0);
> ADVANCE_BATCH();
> diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
> b/src/mesa/drivers/dri/i965/gen7_misc_state.c
> index 1508473..e3a355f 100644
> --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
> @@ -137,39 +137,39 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
> OUT_BATCH((depth - 1) << 21);
> ADVANCE_BATCH();
>
> - if (!hiz) {
> + if (stencil_mt == NULL) {
> BEGIN_BATCH(3);
> - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
> + OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
> OUT_BATCH(0);
> OUT_BATCH(0);
> ADVANCE_BATCH();
> } else {
> - assert(depth_mt);
> + stencil_mt->r8stencil_needs_update = true;
> + const int enabled = devinfo->is_haswell ? HSW_STENCIL_ENABLED : 0;
>
> BEGIN_BATCH(3);
> - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
> - OUT_BATCH((mocs << 25) |
> - (depth_mt->aux_buf->pitch - 1));
> - OUT_RELOC(depth_mt->aux_buf->bo, RELOC_WRITE, 0);
> + OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
> + OUT_BATCH(enabled |
> + mocs << 25 |
> + (stencil_mt->surf.row_pitch - 1));
> + OUT_RELOC(stencil_mt->bo, RELOC_WRITE, 0);
> ADVANCE_BATCH();
> }
>
> - if (stencil_mt == NULL) {
> + if (!hiz) {
> BEGIN_BATCH(3);
> - OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
> + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
> OUT_BATCH(0);
> OUT_BATCH(0);
> ADVANCE_BATCH();
> } else {
> - stencil_mt->r8stencil_needs_update = true;
> - const int enabled = devinfo->is_haswell ? HSW_STENCIL_ENABLED : 0;
> + assert(depth_mt);
>
> BEGIN_BATCH(3);
> - OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
> - OUT_BATCH(enabled |
> - mocs << 25 |
> - (stencil_mt->surf.row_pitch - 1));
> - OUT_RELOC(stencil_mt->bo, RELOC_WRITE, 0);
> + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
> + OUT_BATCH((mocs << 25) |
> + (depth_mt->aux_buf->pitch - 1));
> + OUT_RELOC(depth_mt->aux_buf->bo, RELOC_WRITE, 0);
> ADVANCE_BATCH();
> }
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c
> b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> index 0fc0273..1c77218 100644
> --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> @@ -82,39 +82,39 @@ emit_depth_packets(struct brw_context *brw,
> (depth_mt ? depth_mt->surf.array_pitch_el_rows >> 2 : 0));
> ADVANCE_BATCH();
>
> - if (!hiz) {
> + if (stencil_mt == NULL) {
> BEGIN_BATCH(5);
> - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
> + OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (5 - 2));
> OUT_BATCH(0);
> OUT_BATCH(0);
> OUT_BATCH(0);
> OUT_BATCH(0);
> ADVANCE_BATCH();
> } else {
> - assert(depth_mt);
> BEGIN_BATCH(5);
> - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
> - OUT_BATCH((depth_mt->aux_buf->pitch - 1) | mocs_wb << 25);
> - OUT_RELOC64(depth_mt->aux_buf->bo, RELOC_WRITE, 0);
> - OUT_BATCH(depth_mt->aux_buf->qpitch >> 2);
> + OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (5 - 2));
> + OUT_BATCH(HSW_STENCIL_ENABLED | mocs_wb << 22 |
> + (stencil_mt->surf.row_pitch - 1));
> + OUT_RELOC64(stencil_mt->bo, RELOC_WRITE, 0);
> + OUT_BATCH(stencil_mt->surf.array_pitch_el_rows >> 2);
> ADVANCE_BATCH();
> }
>
> - if (stencil_mt == NULL) {
> + if (!hiz) {
> BEGIN_BATCH(5);
> - OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (5 - 2));
> + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
> OUT_BATCH(0);
> OUT_BATCH(0);
> OUT_BATCH(0);
> OUT_BATCH(0);
> ADVANCE_BATCH();
> } else {
> + assert(depth_mt);
> BEGIN_BATCH(5);
> - OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (5 - 2));
> - OUT_BATCH(HSW_STENCIL_ENABLED | mocs_wb << 22 |
> - (stencil_mt->surf.row_pitch - 1));
> - OUT_RELOC64(stencil_mt->bo, RELOC_WRITE, 0);
> - OUT_BATCH(stencil_mt->surf.array_pitch_el_rows >> 2);
> + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
> + OUT_BATCH((depth_mt->aux_buf->pitch - 1) | mocs_wb << 25);
> + OUT_RELOC64(depth_mt->aux_buf->bo, RELOC_WRITE, 0);
> + OUT_BATCH(depth_mt->aux_buf->qpitch >> 2);
> ADVANCE_BATCH();
> }
>
> --
> 2.5.0.400.gff86faf
>
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