Kenneth Graunke <kenn...@whitecape.org> writes:
> This isn't strictly necessary, but anyone running Cannonlake will
> already have Kernel 4.5 or later, so there's no reason to support
> the relocation model on Gen10+.
>
> This will let us avoid dealing with them for new features.
I think the discussion about aliasing ppgtt won't impact this bit of
code where we've already checked for gtt_size > 4 GiB. Maybe we should
warn about aliasing ppgtt on newer gens? Either way,
Reviewed-by: Scott D Phillips <scott.d.phill...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_bufmgr.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c
> b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> index 4fd95e1d78c..9a059f38aaa 100644
> --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
> +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> @@ -1738,6 +1738,10 @@ brw_bufmgr_init(struct gen_device_info *devinfo, int
> fd)
> 4096, _4GB);
> util_vma_heap_init(&bufmgr->vma_allocator[BRW_MEMZONE_OTHER],
> 1 * _4GB, gtt_size - 1 * _4GB);
> + } else if (devinfo->gen >= 10) {
> + fprintf(stderr, "i965 requires softpin (Kernel 4.5) on Gen10+.");
> + free(bufmgr);
> + return NULL;
> }
> }
>
> --
> 2.17.0
>
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