From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeonsi/si_shader.c | 17 ++++++++---------
.../drivers/radeonsi/si_shader_tgsi_alu.c | 17 ++++++++---------
.../drivers/radeonsi/si_shader_tgsi_mem.c | 7 ++-----
3 files changed, 18 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index e7706f796f3..74a1855c976 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2134,47 +2134,44 @@ void si_load_system_value(struct si_shader_context *ctx,
else
assert(!"INVOCATIONID not implemented");
break;
case TGSI_SEMANTIC_POSITION:
{
LLVMValueRef pos[4] = {
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT),
- lp_build_emit_llvm_unary(&ctx->bld_base,
TGSI_OPCODE_RCP,
- LLVMGetParam(ctx->main_fn,
-
SI_PARAM_POS_W_FLOAT)),
+ ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
+ LLVMGetParam(ctx->main_fn,
SI_PARAM_POS_W_FLOAT)),
};
value = ac_build_gather_values(&ctx->ac, pos, 4);
break;
}
case TGSI_SEMANTIC_FACE:
value = ctx->abi.front_face;
break;
case TGSI_SEMANTIC_SAMPLEID:
value = si_get_sample_id(ctx);
break;
case TGSI_SEMANTIC_SAMPLEPOS: {
LLVMValueRef pos[4] = {
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT),
LLVMConstReal(ctx->f32, 0),
LLVMConstReal(ctx->f32, 0)
};
- pos[0] = lp_build_emit_llvm_unary(&ctx->bld_base,
- TGSI_OPCODE_FRC, pos[0]);
- pos[1] = lp_build_emit_llvm_unary(&ctx->bld_base,
- TGSI_OPCODE_FRC, pos[1]);
+ pos[0] = ac_build_fract(&ctx->ac, pos[0], 32);
+ pos[1] = ac_build_fract(&ctx->ac, pos[1], 32);
value = ac_build_gather_values(&ctx->ac, pos, 4);
break;
}
case TGSI_SEMANTIC_SAMPLEMASK:
/* This can only occur with the OpenGL Core profile, which
* doesn't support smoothing.
*/
value = LLVMGetParam(ctx->main_fn, SI_PARAM_SAMPLE_COVERAGE);
break;
@@ -4015,22 +4012,24 @@ static LLVMValueRef si_llvm_emit_ddxy_interp(
struct lp_build_tgsi_context *bld_base,
LLVMValueRef interp_ij)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef result[4], a;
unsigned i;
for (i = 0; i < 2; i++) {
a = LLVMBuildExtractElement(ctx->ac.builder, interp_ij,
LLVMConstInt(ctx->i32, i, 0), "");
- result[i] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_DDX,
a);
- result[2+i] = lp_build_emit_llvm_unary(bld_base,
TGSI_OPCODE_DDY, a);
+ result[i] = ac_build_ddxy(&ctx->ac, AC_TID_MASK_TOP_LEFT, 1,
+ ac_to_integer(&ctx->ac, a)); /* DDX */
+ result[2+i] = ac_build_ddxy(&ctx->ac, AC_TID_MASK_TOP_LEFT, 2,
+ ac_to_integer(&ctx->ac, a)); /* DDY
*/
}
return ac_build_gather_values(&ctx->ac, result, 4);
}
static void interp_fetch_args(
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index 3008c3ade14..43922dc33ca 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -237,21 +237,23 @@ static void emit_not(const struct lp_build_tgsi_action
*action,
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef v = ac_to_integer(&ctx->ac, emit_data->args[0]);
emit_data->output[emit_data->chan] = LLVMBuildNot(ctx->ac.builder, v,
"");
}
static void emit_arl(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- LLVMValueRef floor_index = lp_build_emit_llvm_unary(bld_base,
TGSI_OPCODE_FLR, emit_data->args[0]);
+ LLVMValueRef floor_index =
+ ac_build_intrinsic(&ctx->ac, "llvm.floor.f32", ctx->f32,
+ &emit_data->args[0], 1,
AC_FUNC_ATTR_READNONE);
emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
floor_index, ctx->i32, "");
}
static void emit_and(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
emit_data->output[emit_data->chan] = LLVMBuildAnd(ctx->ac.builder,
@@ -549,24 +551,22 @@ static void emit_imsb(const struct lp_build_tgsi_action
*action,
emit_data->dst_type);
}
static void emit_iabs(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
emit_data->output[emit_data->chan] =
- lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX,
- emit_data->args[0],
- LLVMBuildNeg(ctx->ac.builder,
- emit_data->args[0], ""));
+ ac_build_imax(&ctx->ac, emit_data->args[0],
+ LLVMBuildNeg(ctx->ac.builder, emit_data->args[0],
""));
}
static void emit_minmax_int(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMIntPredicate op;
switch (emit_data->info->opcode) {
@@ -661,26 +661,25 @@ static void emit_fdiv(const struct lp_build_tgsi_action
*action,
/* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in
* the target machine. f64 needs global unsafe math flags to get rsq. */
static void emit_rsq(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef sqrt =
- lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_SQRT,
- emit_data->args[0]);
+ ac_build_intrinsic(&ctx->ac, "llvm.sqrt.f32", ctx->f32,
+ &emit_data->args[0], 1,
AC_FUNC_ATTR_READNONE);
emit_data->output[emit_data->chan] =
- lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DIV,
- ctx->ac.f32_1, sqrt);
+ ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, sqrt);
}
static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, 0,
TGSI_CHAN_X);
emit_data->arg_count = 1;
}
static void dfracexp_emit(const struct lp_build_tgsi_action *action,
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index c91bcc56971..427fead09d0 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -1279,22 +1279,21 @@ static void tex_fetch_args(
return;
}
/* Fetch and project texture coordinates */
args.coords[3] = lp_build_emit_fetch(bld_base, emit_data->inst, 0,
TGSI_CHAN_W);
for (chan = 0; chan < 3; chan++) {
args.coords[chan] = lp_build_emit_fetch(bld_base,
emit_data->inst, 0,
chan);
if (opcode == TGSI_OPCODE_TXP)
- args.coords[chan] = lp_build_emit_llvm_binary(
- bld_base, TGSI_OPCODE_DIV,
+ args.coords[chan] = ac_build_fdiv(&ctx->ac,
args.coords[chan], args.coords[3]);
}
if (opcode == TGSI_OPCODE_TXP)
args.coords[3] = ctx->ac.f32_1;
/* Pack offsets. */
if (has_offset &&
opcode != TGSI_OPCODE_TXF &&
opcode != TGSI_OPCODE_TXF_LZ) {
@@ -1633,23 +1632,21 @@ si_lower_gather4_integer(struct si_shader_context *ctx,
txq_args.dmask = 0xf;
set_tex_fetch_args(ctx, &txq_emit_data, &txq_args, target);
txq_emit(NULL, &ctx->bld_base, &txq_emit_data);
/* Compute -0.5 / size. */
for (unsigned c = 0; c < 2; c++) {
half_texel[c] =
LLVMBuildExtractElement(builder,
txq_emit_data.output[0],
LLVMConstInt(ctx->i32,
c, 0), "");
half_texel[c] = LLVMBuildUIToFP(builder, half_texel[c],
ctx->f32, "");
- half_texel[c] =
- lp_build_emit_llvm_unary(&ctx->bld_base,
- TGSI_OPCODE_RCP,
half_texel[c]);
+ half_texel[c] = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
half_texel[c]);
half_texel[c] = LLVMBuildFMul(builder, half_texel[c],
LLVMConstReal(ctx->f32,
-0.5), "");
}
if (wa_8888) {
lp_build_endif(&if_ctx);
LLVMBasicBlockRef bb[2] = { if_ctx.true_block,
if_ctx.entry_block };
for (unsigned c = 0; c < 2; c++) {
--
2.17.1
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