Not handling caps explicitly means that we're likely getting incorrect
values -- these need to be reviewed and set appropriately.
While we're at it, add in some missing caps, and set all the subpixel
stuff to 8 as that seems to be what the blob reports.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 16 +++++++++++-----
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 24 +++++++++++++++---------
2 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 210ce18a8c8..f2350c90aae 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -117,6 +117,9 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 8;
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
return 1;
+ case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+ case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
+ return 8;
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
return 4;
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
@@ -127,6 +130,10 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 1024;
case PIPE_CAP_MAX_VERTEX_STREAMS:
return 1;
+ case PIPE_CAP_MAX_GS_INVOCATIONS:
+ return 0;
+ case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
+ return 0;
case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
return 2048;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
@@ -260,7 +267,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
case PIPE_CAP_TGSI_VOTE:
case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
- case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
@@ -295,12 +301,11 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+ case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
+ case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
- case PIPE_CAP_MAX_GS_INVOCATIONS:
- return 32;
- case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
- return 1 << 27;
case PIPE_CAP_VENDOR_ID:
return 0x10de;
case PIPE_CAP_DEVICE_ID: {
@@ -318,6 +323,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_UMA:
return 0;
default:
+ debug_printf("%s: unhandled cap %d\n", __func__, param);
return u_pipe_screen_get_param_defaults(pscreen, param);
}
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 6ad99ed6d65..3da0ad9d50c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -135,6 +135,9 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 8;
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
return 1;
+ case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+ case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
+ return 8;
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
return 4;
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
@@ -145,6 +148,10 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 1024;
case PIPE_CAP_MAX_VERTEX_STREAMS:
return 4;
+ case PIPE_CAP_MAX_GS_INVOCATIONS:
+ return 32;
+ case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
+ return 1 << 27;
case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
return 2048;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
@@ -260,6 +267,10 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
case PIPE_CAP_TGSI_FS_FBFETCH:
return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */
+ case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
+ case PIPE_CAP_TGSI_BALLOT:
+ case PIPE_CAP_BINDLESS_TEXTURE:
+ return class_3d >= NVE4_3D_CLASS;
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
@@ -269,16 +280,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
return class_3d >= GM200_3D_CLASS;
- case PIPE_CAP_MAX_GS_INVOCATIONS:
- return 32;
- case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
- return 1 << 27;
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
return class_3d >= GP100_3D_CLASS;
- case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
- case PIPE_CAP_TGSI_BALLOT:
- case PIPE_CAP_BINDLESS_TEXTURE:
- return class_3d >= NVE4_3D_CLASS;
/* unsupported caps */
case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
@@ -303,7 +306,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_PCI_BUS:
case PIPE_CAP_PCI_DEVICE:
case PIPE_CAP_PCI_FUNCTION:
- case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
@@ -322,6 +324,9 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_CONSTBUF0_FLAGS:
case PIPE_CAP_PACKED_UNIFORMS:
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
+ case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+ case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
+ case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
case PIPE_CAP_VENDOR_ID:
@@ -341,6 +346,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_UMA:
return 0;
default:
+ debug_printf("%s: unhandled cap %d\n", __func__, param);
return u_pipe_screen_get_param_defaults(pscreen, param);
}
}
--
2.16.4
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