This is a pseudo instruction that enables the LLVM backend to encode
instructions and pass it through r600_bytecode_build()
---
src/gallium/drivers/r600/eg_asm.c | 4 ++++
src/gallium/drivers/r600/r600_asm.c | 7 +++++++
src/gallium/drivers/r600/r600_asm.h | 9 +++++++++
3 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/eg_asm.c
b/src/gallium/drivers/r600/eg_asm.c
index b6d03ef..d2c1679 100644
--- a/src/gallium/drivers/r600/eg_asm.c
+++ b/src/gallium/drivers/r600/eg_asm.c
@@ -133,6 +133,10 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct
r600_bytecode_cf *cf)
S_SQ_CF_WORD1_COND(cf->cond) |
S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
break;
+ case CF_NATIVE:
+ bc->bytecode[id++] = cf->isa[0];
+ bc->bytecode[id++] = cf->isa[1];
+ break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
return -EINVAL;
diff --git a/src/gallium/drivers/r600/r600_asm.c
b/src/gallium/drivers/r600/r600_asm.c
index 5f83879..d1a0a4a 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -1928,6 +1928,7 @@ int r600_bytecode_build(struct r600_bytecode *bc)
case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
+ case CF_NATIVE:
break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n",
cf->inst);
@@ -2070,6 +2071,8 @@ int r600_bytecode_build(struct r600_bytecode *bc)
case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
break;
+ case CF_NATIVE:
+ break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n",
cf->inst);
return -EINVAL;
@@ -2342,6 +2345,10 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
fprintf(stderr, "COND:%X ", cf->cond);
fprintf(stderr, "POP_COUNT:%X\n",
cf->pop_count);
break;
+ case CF_NATIVE:
+ fprintf(stderr, "%04d %08X CF NATIVE\n", id,
bc->bytecode[id]);
+ fprintf(stderr, "%04d %08X CF NATIVE\n", id +
1, bc->bytecode[id + 1]);
+ break;
default:
R600_ERR("Unknown instruction %0x\n", cf->inst);
}
diff --git a/src/gallium/drivers/r600/r600_asm.h
b/src/gallium/drivers/r600/r600_asm.h
index 86d44d3..8662ced 100644
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -135,6 +135,14 @@ struct r600_bytecode_kcache {
unsigned addr;
};
+/* A value of CF_NATIVE in r600_bytecode_cf::inst means that this instruction
+ * has already been encoded, and the encoding has been stored in
+ * r600_bytecode::isa. This is used by the LLVM backend to emit CF
instructions
+ * e.g. RAT_WRITE_* that can't be properly represented by struct
+ * r600_bytecode_cf.
+ */
+#define CF_NATIVE ~0
+
struct r600_bytecode_cf {
struct list_head list;
@@ -157,6 +165,7 @@ struct r600_bytecode_cf {
struct r600_bytecode_alu *curr_bs_head;
struct r600_bytecode_alu *prev_bs_head;
struct r600_bytecode_alu *prev2_bs_head;
+ unsigned isa[2];
};
#define FC_NONE 0
--
1.7.7.6
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