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On Wed, Feb 13, 2019 at 5:14 PM Caio Marcelo de Oliveira Filho <
caio.olive...@intel.com> wrote:

> Reviewed-by: Caio Marcelo de Oliveira Filho <caio.olive...@intel.com>
>
>
> On Wed, Feb 13, 2019 at 03:03:59PM -0800, Ian Romanick wrote:
> > From: Ian Romanick <ian.d.roman...@intel.com>
> >
> > Fixes: c6465fec0c5 ("spirv: add SpvCapabilityInt64Atomics")
> > CID: 1442555
> > ---
> >  src/compiler/spirv/spirv_to_nir.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/src/compiler/spirv/spirv_to_nir.c
> b/src/compiler/spirv/spirv_to_nir.c
> > index 1cbc926c818..5e8eb222555 100644
> > --- a/src/compiler/spirv/spirv_to_nir.c
> > +++ b/src/compiler/spirv/spirv_to_nir.c
> > @@ -3590,6 +3590,7 @@ vtn_handle_preamble_instruction(struct vtn_builder
> *b, SpvOp opcode,
> >
> >        case SpvCapabilityInt64Atomics:
> >           spv_check_supported(int64_atomics, cap);
> > +         break;
> >
> >        case SpvCapabilityInt8:
> >           spv_check_supported(int8, cap);
> > --
> > 2.14.5
> >
> > _______________________________________________
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> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
>
>         Caio
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