v2: rebase
v2: fix 64-bit visit_load_var()
Signed-off-by: Rhys Perry <pendingchao...@gmail.com>
---
src/amd/common/ac_nir_to_llvm.c | 14 ++++++++++----
src/amd/vulkan/radv_nir_to_llvm.c | 22 +++++++++-------------
2 files changed, 19 insertions(+), 17 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 5821c18aeb1..bf7024c68e4 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2114,7 +2114,10 @@ static LLVMValueRef visit_load_var(struct ac_nir_context
*ctx,
unreachable("unhandle variable mode");
}
ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
- return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx,
&instr->dest.ssa), "");
+ if (instr->dest.ssa.bit_size == 16)
+ return ac_build_reinterpret(&ctx->ac, ret, get_def_type(ctx,
&instr->dest.ssa));
+ else
+ return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx,
&instr->dest.ssa), "");
}
static void
@@ -2152,6 +2155,11 @@ visit_store_var(struct ac_nir_context *ctx,
writemask = writemask << comp;
+ LLVMTypeRef type = ctx->ac.f32;
+ if (LLVMGetTypeKind(LLVMTypeOf(src)) == LLVMVectorTypeKind)
+ type = LLVMVectorType(ctx->ac.f32,
LLVMGetVectorSize(LLVMTypeOf(src)));
+ src = ac_build_reinterpret(&ctx->ac, src, type);
+
switch (deref->mode) {
case nir_var_shader_out:
@@ -4329,12 +4337,10 @@ ac_handle_shader_output_decl(struct ac_llvm_context
*ctx,
}
}
- bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
- LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
for (unsigned i = 0; i < attrib_count; ++i) {
for (unsigned chan = 0; chan < 4; chan++) {
abi->outputs[ac_llvm_reg_index_soa(output_loc + i,
chan)] =
- ac_build_alloca_undef(ctx, type, "");
+ ac_build_alloca_undef(ctx, ctx->f32, "");
}
}
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index 8fdaee72036..2002a744545 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -2305,6 +2305,7 @@ si_llvm_init_export_args(struct radv_shader_context *ctx,
bool is_16bit = ac_get_type_size(LLVMTypeOf(values[0])) == 2;
if (ctx->stage == MESA_SHADER_FRAGMENT) {
+ bool is_16bit = ac_get_type_size(LLVMTypeOf(values[0])) == 2;
unsigned index = target - V_008DFC_SQ_EXP_MRT;
unsigned col_format = (ctx->options->key.fs.col_format >> (4 *
index)) & 0xf;
bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1;
@@ -2421,16 +2422,8 @@ si_llvm_init_export_args(struct radv_shader_context *ctx,
return;
}
- if (is_16bit) {
- for (unsigned chan = 0; chan < 4; chan++) {
- values[chan] = LLVMBuildBitCast(ctx->ac.builder,
values[chan], ctx->ac.i16, "");
- args->out[chan] = LLVMBuildZExt(ctx->ac.builder,
values[chan], ctx->ac.i32, "");
- }
- } else
- memcpy(&args->out[0], values, sizeof(values[0]) * 4);
-
- for (unsigned i = 0; i < 4; ++i)
- args->out[i] = ac_to_float(&ctx->ac, args->out[i]);
+ for (unsigned chan = 0; chan < 4; chan++)
+ args->out[chan] = ac_build_reinterpret(&ctx->ac, values[chan],
ctx->ac.f32);
}
static void
@@ -3137,9 +3130,12 @@ handle_fs_outputs_post(struct radv_shader_context *ctx)
if (i < FRAG_RESULT_DATA0)
continue;
- for (unsigned j = 0; j < 4; j++)
- values[j] = ac_to_float(&ctx->ac,
- radv_load_output(ctx, i, j));
+ for (unsigned j = 0; j < 4; j++) {
+ values[j] = radv_load_output(ctx, i, j);
+ unsigned index = ac_llvm_reg_index_soa(i, 0);
+ LLVMTypeRef new_type = ctx->abi.output_types[index];
+ values[j] = ac_build_reinterpret(&ctx->ac, values[j],
new_type);
+ }
bool ret = si_export_mrt_color(ctx, values,
i - FRAG_RESULT_DATA0,
--
2.20.1
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