Thanks! Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
On Wed, Jun 19, 2019 at 8:09 AM Boris Brezillon < boris.brezil...@collabora.com> wrote: > We don't expect the output of a TXS instruction to be wider than a > vec3. Add an assert() to make sure this never happens. > > Suggested-by: Jason Ekstrand <ja...@jlekstrand.net> > Signed-off-by: Boris Brezillon <boris.brezil...@collabora.com> > --- > src/compiler/nir/nir_lower_tex.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/compiler/nir/nir_lower_tex.c > b/src/compiler/nir/nir_lower_tex.c > index 8a36edfbc5e4..05b46b902521 100644 > --- a/src/compiler/nir/nir_lower_tex.c > +++ b/src/compiler/nir/nir_lower_tex.c > @@ -1011,6 +1011,7 @@ nir_lower_txs_lod(nir_builder *b, nir_tex_instr *tex) > if (tex->is_array) { > nir_ssa_def *comp[3]; > > + assert(dest_size <= ARRAY_SIZE(comp)); > for (unsigned i = 0; i < dest_size - 1; i++) > comp[i] = nir_channel(b, minified, i); > > -- > 2.20.1 > >
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