Found by inspection.
Cc: <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
---
src/amd/vulkan/radv_pipeline.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a3323ae8135..f6cb3611c9d 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3264,6 +3264,10 @@ radv_pipeline_generate_vgt_gs_mode(struct radeon_cmdbuf
*ctx_cs,
struct radv_pipeline *pipeline)
{
const struct radv_vs_output_info *outinfo =
get_vs_output_info(pipeline);
+ const struct radv_shader_variant *vs =
+ pipeline->shaders[MESA_SHADER_TESS_EVAL] ?
+ pipeline->shaders[MESA_SHADER_TESS_EVAL] :
+ pipeline->shaders[MESA_SHADER_VERTEX];
unsigned vgt_primitiveid_en = 0;
uint32_t vgt_gs_mode = 0;
@@ -3274,16 +3278,12 @@ radv_pipeline_generate_vgt_gs_mode(struct radeon_cmdbuf
*ctx_cs,
vgt_gs_mode = ac_vgt_gs_mode(gs->info.gs.vertices_out,
pipeline->device->physical_device->rad_info.chip_class);
} else if (radv_pipeline_has_ngg(pipeline)) {
- const struct radv_shader_variant *vs =
- pipeline->shaders[MESA_SHADER_TESS_EVAL] ?
- pipeline->shaders[MESA_SHADER_TESS_EVAL] :
- pipeline->shaders[MESA_SHADER_VERTEX];
bool enable_prim_id =
outinfo->export_prim_id || vs->info.info.uses_prim_id;
vgt_primitiveid_en |= S_028A84_PRIMITIVEID_EN(enable_prim_id) |
S_028A84_NGG_DISABLE_PROVOK_REUSE(enable_prim_id);
- } else if (outinfo->export_prim_id) {
+ } else if (outinfo->export_prim_id || vs->info.info.uses_prim_id) {
vgt_gs_mode = S_028A40_MODE(V_028A40_GS_SCENARIO_A);
vgt_primitiveid_en |= S_028A84_PRIMITIVEID_EN(1);
}
--
2.22.0
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