On 02.08.2012 11:46, Michel Dänzer wrote:
On Don, 2012-08-02 at 11:33 +0200, Christian König wrote:
On 02.08.2012 11:21, Michel Dänzer wrote:
On Don, 2012-08-02 at 11:05 +0200, Christian König wrote:
On 02.08.2012 07:51, Michel Dänzer wrote:
Couldn't this incorrectly clobber components of the destination which
were supposed to be masked?
No cause it is just an optimization of not fetching unwanted components,
and not masking anything.
Hmm, but can't it happen that LLVM assigns destination GPRs containing
previous values that need to be preserved according to the TGSI
writemask?
Not currently, as far as I can see, in opposition to the R600 target it
always seems to allocate a new set of 4 registers and then picks the
elements we wanted for the writemask separately.
Okay, thanks.
Does I have your Reviewed-by for this patch also and can push that stuff?
Still waiting for Toms opinion on the backend code of course.
Christian.
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