On Tue, Sep 11, 2012 at 1:10 PM, Marek Olšák <mar...@gmail.com> wrote: > Please provide information about the GPU and the test which locks up. I'd > like to reproduce it. Also please explain what's the cause of the > lockup if you know it (which registers are not emitted in the correct > order and how it can fixed). > > Marek >
For instance http://people.freedesktop.org/~glisse/registerposition/lockup-longprim.sh will lockup probably any r6xx/r7xx (definitely rv670 & rv770) I know that the whole vgt register order is picky and that most of them need to be emitted before ta_cntl_aux and before cb/db. But the ordering relative to pa is kind of weird and moving when looking at fglrx. Cheers, Jerome > On Tue, Sep 11, 2012 at 6:48 PM, Jerome Glisse <j.gli...@gmail.com> wrote: >> On Mon, Sep 10, 2012 at 7:16 PM, Marek Olšák <mar...@gmail.com> wrote: >> >> NAK this one introduce lockup. As i said in another email register >> group/order matter and with this patch i get 100% lockup rate in some >> test case for instance the test case i reference in my other email >> >>> --- >>> src/gallium/drivers/r600/evergreen_hw_context.c | 16 ----------- >>> src/gallium/drivers/r600/r600.h | 7 ----- >>> src/gallium/drivers/r600/r600_hw_context.c | 15 ++-------- >>> src/gallium/drivers/r600/r600_hw_context_priv.h | 2 +- >>> src/gallium/drivers/r600/r600_pipe.h | 8 +++--- >>> src/gallium/drivers/r600/r600_state_common.c | 34 >>> ++++++++++++----------- >>> 6 files changed, 26 insertions(+), 56 deletions(-) >>> >>> diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c >>> b/src/gallium/drivers/r600/evergreen_hw_context.c >>> index 483021f..0c2159a 100644 >>> --- a/src/gallium/drivers/r600/evergreen_hw_context.c >>> +++ b/src/gallium/drivers/r600/evergreen_hw_context.c >>> @@ -32,10 +32,6 @@ static const struct r600_reg cayman_config_reg_list[] = { >>> {R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS | >>> REG_FLAG_FLUSH_CHANGE, 0}, >>> }; >>> >>> -static const struct r600_reg evergreen_ctl_const_list[] = { >>> - {R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0}, >>> -}; >>> - >>> static const struct r600_reg evergreen_context_reg_list[] = { >>> {R_028008_DB_DEPTH_VIEW, 0, 0}, >>> {R_028010_DB_RENDER_OVERRIDE2, 0, 0}, >>> @@ -63,10 +59,6 @@ static const struct r600_reg >>> evergreen_context_reg_list[] = { >>> {R_028254_PA_SC_VPORT_SCISSOR_0_BR, 0, 0}, >>> {R_028350_SX_MISC, 0, 0}, >>> {GROUP_FORCE_NEW_BLOCK, 0, 0}, >>> - {R_028408_VGT_INDX_OFFSET, 0, 0}, >>> - {R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0}, >>> - {R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0}, >>> - {GROUP_FORCE_NEW_BLOCK, 0, 0}, >>> {R_02861C_SPI_VS_OUT_ID_0, 0, 0}, >>> {R_028620_SPI_VS_OUT_ID_1, 0, 0}, >>> {R_028624_SPI_VS_OUT_ID_2, 0, 0}, >>> @@ -353,10 +345,6 @@ static const struct r600_reg cayman_context_reg_list[] >>> = { >>> {R_028254_PA_SC_VPORT_SCISSOR_0_BR, 0, 0}, >>> {R_028350_SX_MISC, 0, 0}, >>> {GROUP_FORCE_NEW_BLOCK, 0, 0}, >>> - {R_028408_VGT_INDX_OFFSET, 0, 0}, >>> - {R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0}, >>> - {R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0}, >>> - {GROUP_FORCE_NEW_BLOCK, 0, 0}, >>> {R_02861C_SPI_VS_OUT_ID_0, 0, 0}, >>> {R_028620_SPI_VS_OUT_ID_1, 0, 0}, >>> {R_028624_SPI_VS_OUT_ID_2, 0, 0}, >>> @@ -664,10 +652,6 @@ int evergreen_context_init(struct r600_context *ctx) >>> >>> Elements(evergreen_context_reg_list), PKT3_SET_CONTEXT_REG, >>> EVERGREEN_CONTEXT_REG_OFFSET); >>> if (r) >>> goto out_err; >>> - r = r600_context_add_block(ctx, evergreen_ctl_const_list, >>> - Elements(evergreen_ctl_const_list), >>> PKT3_SET_CTL_CONST, EVERGREEN_CTL_CONST_OFFSET); >>> - if (r) >>> - goto out_err; >>> >>> /* PS loop const */ >>> evergreen_loop_const_init(ctx, 0); >>> diff --git a/src/gallium/drivers/r600/r600.h >>> b/src/gallium/drivers/r600/r600.h >>> index 6363a03..83d21a4 100644 >>> --- a/src/gallium/drivers/r600/r600.h >>> +++ b/src/gallium/drivers/r600/r600.h >>> @@ -228,11 +228,4 @@ void _r600_pipe_state_add_reg(struct r600_context *ctx, >>> #define r600_pipe_state_add_reg_bo(state, offset, value, bo, usage) >>> _r600_pipe_state_add_reg_bo(rctx, state, offset, value, >>> CTX_RANGE_ID(offset), CTX_BLOCK_ID(offset), bo, usage) >>> #define r600_pipe_state_add_reg(state, offset, value) >>> _r600_pipe_state_add_reg(rctx, state, offset, value, CTX_RANGE_ID(offset), >>> CTX_BLOCK_ID(offset)) >>> >>> -static inline void r600_pipe_state_mod_reg(struct r600_pipe_state *state, >>> - uint32_t value) >>> -{ >>> - state->regs[state->nregs].value = value; >>> - state->nregs++; >>> -} >>> - >>> #endif >>> diff --git a/src/gallium/drivers/r600/r600_hw_context.c >>> b/src/gallium/drivers/r600/r600_hw_context.c >>> index 57dcc7e..122f878 100644 >>> --- a/src/gallium/drivers/r600/r600_hw_context.c >>> +++ b/src/gallium/drivers/r600/r600_hw_context.c >>> @@ -233,10 +233,6 @@ static const struct r600_reg r600_config_reg_list[] = { >>> {R_008C04_SQ_GPR_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS | >>> REG_FLAG_FLUSH_CHANGE, 0}, >>> }; >>> >>> -static const struct r600_reg r600_ctl_const_list[] = { >>> - {R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0}, >>> -}; >>> - >>> static const struct r600_reg r600_context_reg_list[] = { >>> {R_028A4C_PA_SC_MODE_CNTL, 0, 0}, >>> {GROUP_FORCE_NEW_BLOCK, 0, 0}, >>> @@ -461,9 +457,6 @@ static const struct r600_reg r600_context_reg_list[] = { >>> {GROUP_FORCE_NEW_BLOCK, 0, 0}, >>> {R_028850_SQ_PGM_RESOURCES_PS, 0, 0}, >>> {R_028854_SQ_PGM_EXPORTS_PS, 0, 0}, >>> - {R_028408_VGT_INDX_OFFSET, 0, 0}, >>> - {R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0}, >>> - {R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0}, >>> {R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX, 0, 0}, >>> {R_028C20_PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX, 0, 0}, >>> }; >>> @@ -555,10 +548,6 @@ int r600_context_init(struct r600_context *ctx) >>> Elements(r600_context_reg_list), >>> PKT3_SET_CONTEXT_REG, R600_CONTEXT_REG_OFFSET); >>> if (r) >>> goto out_err; >>> - r = r600_context_add_block(ctx, r600_ctl_const_list, >>> - Elements(r600_ctl_const_list), >>> PKT3_SET_CTL_CONST, R600_CTL_CONST_OFFSET); >>> - if (r) >>> - goto out_err; >>> >>> /* PS loop const */ >>> r600_loop_const_init(ctx, 0); >>> @@ -1067,8 +1056,10 @@ void r600_begin_new_cs(struct r600_context *ctx) >>> enable_block->nreg_dirty = enable_block->nreg; >>> } >>> >>> - /* Re-emit the primitive type. */ >>> + /* Re-emit the draw state. */ >>> ctx->last_primitive_type = -1; >>> + ctx->last_start_instance = -1; >>> + ctx->last_prim_restart_enable = -1; >>> } >>> >>> void r600_context_emit_fence(struct r600_context *ctx, struct >>> r600_resource *fence_bo, unsigned offset, unsigned value) >>> diff --git a/src/gallium/drivers/r600/r600_hw_context_priv.h >>> b/src/gallium/drivers/r600/r600_hw_context_priv.h >>> index 3326963..996bfaa 100644 >>> --- a/src/gallium/drivers/r600/r600_hw_context_priv.h >>> +++ b/src/gallium/drivers/r600/r600_hw_context_priv.h >>> @@ -30,7 +30,7 @@ >>> >>> /* the number of CS dwords for flushing and drawing */ >>> #define R600_MAX_FLUSH_CS_DWORDS 44 >>> -#define R600_MAX_DRAW_CS_DWORDS 22 >>> +#define R600_MAX_DRAW_CS_DWORDS 34 >>> >>> /* these flags are used in register flags and added into block flags */ >>> #define REG_FLAG_NEED_BO 1 >>> diff --git a/src/gallium/drivers/r600/r600_pipe.h >>> b/src/gallium/drivers/r600/r600_pipe.h >>> index 27d57d1..d8e2b71 100644 >>> --- a/src/gallium/drivers/r600/r600_pipe.h >>> +++ b/src/gallium/drivers/r600/r600_pipe.h >>> @@ -142,7 +142,6 @@ enum r600_pipe_state_id { >>> R600_PIPE_STATE_BLEND = 0, >>> R600_PIPE_STATE_SCISSOR, >>> R600_PIPE_STATE_RASTERIZER, >>> - R600_PIPE_STATE_VGT, >>> R600_PIPE_STATE_FRAMEBUFFER, >>> R600_PIPE_STATE_DSA, >>> R600_PIPE_STATE_POLYGON_OFFSET, >>> @@ -356,7 +355,6 @@ struct r600_context { >>> struct r600_pipe_shader_selector *ps_shader; >>> struct r600_pipe_shader_selector *vs_shader; >>> struct r600_pipe_rasterizer *rasterizer; >>> - struct r600_pipe_state vgt; >>> struct r600_pipe_state spi; >>> struct pipe_query *current_render_cond; >>> unsigned current_render_cond_mode; >>> @@ -476,8 +474,10 @@ struct r600_context { >>> struct r600_resource *dummy_fmask; >>> struct r600_resource *dummy_cmask; >>> >>> - /* Last primitive type used in draw_vbo. */ >>> - int last_primitive_type; >>> + /* Last draw state (-1 = unset). */ >>> + int last_primitive_type; /* Last primitive type used in draw_vbo. */ >>> + int last_start_instance; >>> + int last_prim_restart_enable; >>> }; >>> >>> static INLINE void r600_emit_atom(struct r600_context *rctx, struct >>> r600_atom *atom) >>> diff --git a/src/gallium/drivers/r600/r600_state_common.c >>> b/src/gallium/drivers/r600/r600_state_common.c >>> index 8ff0cdf..68725d7 100644 >>> --- a/src/gallium/drivers/r600/r600_state_common.c >>> +++ b/src/gallium/drivers/r600/r600_state_common.c >>> @@ -1197,22 +1197,6 @@ static void r600_draw_vbo(struct pipe_context *ctx, >>> const struct pipe_draw_info >>> info.index_bias = info.start; >>> } >>> >>> - if (rctx->vgt.id != R600_PIPE_STATE_VGT) { >>> - rctx->vgt.id = R600_PIPE_STATE_VGT; >>> - rctx->vgt.nregs = 0; >>> - r600_pipe_state_add_reg(&rctx->vgt, >>> R_028408_VGT_INDX_OFFSET, info.index_bias); >>> - r600_pipe_state_add_reg(&rctx->vgt, >>> R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index); >>> - r600_pipe_state_add_reg(&rctx->vgt, >>> R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart); >>> - r600_pipe_state_add_reg(&rctx->vgt, >>> R_03CFF4_SQ_VTX_START_INST_LOC, info.start_instance); >>> - } >>> - >>> - rctx->vgt.nregs = 0; >>> - r600_pipe_state_mod_reg(&rctx->vgt, info.index_bias); >>> - r600_pipe_state_mod_reg(&rctx->vgt, info.restart_index); >>> - r600_pipe_state_mod_reg(&rctx->vgt, info.primitive_restart); >>> - r600_pipe_state_mod_reg(&rctx->vgt, info.start_instance); >>> - r600_context_pipe_state_set(rctx, &rctx->vgt); >>> - >>> /* Enable stream out if needed. */ >>> if (rctx->streamout_start) { >>> r600_context_streamout_begin(rctx); >>> @@ -1234,6 +1218,24 @@ static void r600_draw_vbo(struct pipe_context *ctx, >>> const struct pipe_draw_info >>> } >>> rctx->pm4_dirty_cdwords = 0; >>> >>> + /* Set the index offset. */ >>> + r600_write_context_reg(cs, R_028408_VGT_INDX_OFFSET, >>> info.index_bias); >>> + >>> + /* Update primitive restart. */ >>> + if (rctx->last_prim_restart_enable != info.primitive_restart) { >>> + r600_write_context_reg(cs, >>> R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart); >>> + rctx->last_prim_restart_enable = info.primitive_restart; >>> + } >>> + if (info.primitive_restart) { >>> + r600_write_context_reg(cs, >>> R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index); >>> + } >>> + >>> + /* Update start instance. */ >>> + if (rctx->last_start_instance != info.start_instance) { >>> + r600_write_ctl_const(cs, R_03CFF4_SQ_VTX_START_INST_LOC, >>> info.start_instance); >>> + rctx->last_start_instance = info.start_instance; >>> + } >>> + >>> /* Update the primitive type. */ >>> if (rctx->last_primitive_type != info.mode) { >>> unsigned ls_mask = 0; >>> -- >>> 1.7.9.5 >>> >>> _______________________________________________ >>> mesa-dev mailing list >>> mesa-dev@lists.freedesktop.org >>> http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev