Kenneth Graunke <kenn...@whitecape.org> writes:
> On 03/21/2014 06:27 PM, Eric Anholt wrote:
>> This gets us equivalent code paths on BDW and pre-BDW, except for stencil
>> (where we don't have MSAA stencil resolve code yet)
>>
>> v2: Move the new meta code to brw_meta_updownsample.c, name it
>> brw_meta_updownsample(), add a comment about
>> intel_rb_storage_first_mt_slice(), and rename that function and move
>> the RB generation into it (review ideas by Ken).
>> v3: Fix 2 src vs dst pasteos in previous change.
>> ---
>> src/mesa/drivers/dri/i965/Makefile.sources | 1 +
>> src/mesa/drivers/dri/i965/brw_context.h | 6 +
>> src/mesa/drivers/dri/i965/brw_meta_updownsample.c | 132
>> ++++++++++++++++++++++
>> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 ++--
>> 4 files changed, 152 insertions(+), 8 deletions(-)
>> create mode 100644 src/mesa/drivers/dri/i965/brw_meta_updownsample.c
>>
>> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
>> b/src/mesa/drivers/dri/i965/Makefile.sources
>> index 1649369..dfb88e2 100644
>> --- a/src/mesa/drivers/dri/i965/Makefile.sources
>> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
>> @@ -74,6 +74,7 @@ i965_FILES = \
>> brw_interpolation_map.c \
>> brw_lower_texture_gradients.cpp \
>> brw_lower_unnormalized_offset.cpp \
>> + brw_meta_updownsample.c \
>> brw_misc_state.c \
>> brw_object_purgeable.c \
>> brw_performance_monitor.c \
>> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
>> b/src/mesa/drivers/dri/i965/brw_context.h
>> index 32fc38b..04af5d0 100644
>> --- a/src/mesa/drivers/dri/i965/brw_context.h
>> +++ b/src/mesa/drivers/dri/i965/brw_context.h
>> @@ -1484,6 +1484,12 @@ GLboolean brwCreateContext(gl_api api,
>> /*======================================================================
>> * brw_misc_state.c
>> */
>> +void brw_meta_updownsample(struct brw_context *brw,
>> + struct intel_mipmap_tree *src,
>> + struct intel_mipmap_tree *dst);
>> +/*======================================================================
>> + * brw_misc_state.c
>> + */
>> void brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
>> uint32_t depth_level,
>> uint32_t depth_layer,
>> diff --git a/src/mesa/drivers/dri/i965/brw_meta_updownsample.c
>> b/src/mesa/drivers/dri/i965/brw_meta_updownsample.c
>> new file mode 100644
>> index 0000000..de25bf4
>> --- /dev/null
>> +++ b/src/mesa/drivers/dri/i965/brw_meta_updownsample.c
>> @@ -0,0 +1,132 @@
>> +/*
>> + * Copyright © 2014 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the
>> "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the next
>> + * paragraph) shall be included in all copies or substantial portions of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
>> OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
>> DEALINGS
>> + * IN THE SOFTWARE.
>> + */
>> +
>> +#include "brw_context.h"
>> +#include "intel_batchbuffer.h"
>> +#include "intel_fbo.h"
>> +
>> +#include "main/blit.h"
>> +#include "main/buffers.h"
>> +#include "main/fbobject.h"
>> +
>> +#include "drivers/common/meta.h"
>> +
>> +/**
>> + * @file brw_meta_updownsample.c
>> + *
>> + * Implements upsampling and downsampling of miptrees for window system
>> + * framebuffers.
>> + */
>> +
>> +/**
>> + * Creates a new named renderbuffer that wraps the first slice
>> + * of an existing miptree.
>> + *
>> + * Clobbers the current renderbuffer binding (ctx->CurrentRenderbuffer).
>> + */
>> +static GLuint
>> +brw_get_rb_for_first_slice(struct brw_context *brw, struct
>> intel_mipmap_tree *mt)
>> +{
>> + struct gl_context *ctx = &brw->ctx;
>> + GLuint rbo;
>> + struct gl_renderbuffer *rb;
>> + struct intel_renderbuffer *irb;
>> +
>> + /* This turns the GenRenderbuffers name into an actual struct
>> + * intel_renderbuffer.
>> + */
>> + _mesa_GenRenderbuffers(1, &rbo);
>> + _mesa_BindRenderbuffer(GL_RENDERBUFFER, rbo);
>> +
>> + rb = ctx->CurrentRenderbuffer;
>> + irb = intel_renderbuffer(rb);
>> +
>> + rb->Format = mt->format;
>> + rb->_BaseFormat = _mesa_base_fbo_format(ctx, mt->format);
>> +
>> + rb->NumSamples = mt->num_samples;
>> + rb->Width = mt->logical_width0;
>> + rb->Height = mt->logical_height0;
>> +
>> + intel_miptree_reference(&irb->mt, mt);
>> +
>> + return rbo;
>> +}
>> +
>> +/**
>> + * Implementation of up or downsampling for window-system MSAA miptrees.
>> + */
>> +void
>> +brw_meta_updownsample(struct brw_context *brw,
>> + struct intel_mipmap_tree *src_mt,
>> + struct intel_mipmap_tree *dst_mt)
>> +{
>> + struct gl_context *ctx = &brw->ctx;
>> + GLuint fbos[2], src_rbo, dst_rbo, src_fbo, dst_fbo;
>> + GLenum drawbuffer;
>> + GLbitfield attachment, blit_bit;
>> +
>> + if (_mesa_get_format_base_format(src_mt->format) == GL_DEPTH_COMPONENT ||
>> + _mesa_get_format_base_format(src_mt->format) == GL_DEPTH_STENCIL) {
>> + attachment = GL_DEPTH_ATTACHMENT;
>> + drawbuffer = GL_NONE;
>> + blit_bit = GL_DEPTH_BUFFER_BIT;
>> + } else {
>> + attachment = GL_COLOR_ATTACHMENT0;
>> + drawbuffer = GL_COLOR_ATTACHMENT0;
>> + blit_bit = GL_COLOR_BUFFER_BIT;
>> + }
>> +
>> + intel_batchbuffer_emit_mi_flush(brw);
>> +
>> + _mesa_meta_begin(ctx, MESA_META_ALL);
>> + _mesa_GenFramebuffers(2, fbos);
>> + src_rbo = brw_get_rb_for_first_slice(brw, src_mt);
>> + dst_rbo = brw_get_rb_for_first_slice(brw, dst_mt);
>> + src_fbo = fbos[0];
>> + dst_fbo = fbos[1];
>> +
>> + _mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, src_fbo);
>> + _mesa_FramebufferRenderbuffer(GL_READ_FRAMEBUFFER, attachment,
>> + GL_RENDERBUFFER, src_rbo);
>> + _mesa_ReadBuffer(drawbuffer);
>> +
>> + _mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, dst_fbo);
>> + _mesa_FramebufferRenderbuffer(GL_DRAW_FRAMEBUFFER, attachment,
>> + GL_RENDERBUFFER, dst_rbo);
>> + _mesa_DrawBuffer(drawbuffer);
>> +
>> + _mesa_BlitFramebuffer(0, 0,
>> + src_mt->logical_width0, src_mt->logical_height0,
>> + 0, 0,
>> + dst_mt->logical_width0, dst_mt->logical_height0,
>> + blit_bit, GL_NEAREST);
>> +
>> + _mesa_DeleteRenderbuffers(1, &src_rbo);
>> + _mesa_DeleteRenderbuffers(1, &dst_rbo);
>> + _mesa_DeleteFramebuffers(2, fbos);
>> +
>> + _mesa_meta_end(ctx);
>> +
>> + intel_batchbuffer_emit_mi_flush(brw);
>> +}
>> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> index 10a1bbc..d846a8b 100644
>> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> @@ -41,6 +41,7 @@
>> #include "brw_context.h"
>>
>> #include "main/enums.h"
>> +#include "main/fbobject.h"
>> #include "main/formats.h"
>> #include "main/glformats.h"
>> #include "main/texcompress_etc.h"
>> @@ -1555,14 +1556,18 @@ intel_miptree_updownsample(struct brw_context *brw,
>> struct intel_mipmap_tree *src,
>> struct intel_mipmap_tree *dst)
>> {
>> - brw_blorp_blit_miptrees(brw,
>> - src, 0 /* level */, 0 /* layer */,
>> - dst, 0 /* level */, 0 /* layer */,
>> - 0, 0,
>> - src->logical_width0, src->logical_height0,
>> - 0, 0,
>> - dst->logical_width0, dst->logical_height0,
>> - GL_NEAREST, false, false /*mirror x, y*/);
>> + if (src->format == MESA_FORMAT_S_UINT8) {
>
> This looks good, but...
>
> It seems to be roughly a 7% performance drop on Iris Pro for:
> $ glxgears -samples 8 -geometry 1024x768Is glxgears actually rendering correctly for you with that case? Because my patch also happens to fix glxgears rendering with vblank_mode=0 and -samples 4 or 8 for me -- using blorp, a bunch of the prims aren't being rendered or are flickering. I'm seeing -6.6175% +/- 1.58037% on gears -samples 4 (n=13), but 7.94496% +/- 2.38429% (n=16) on citybench with FORCE_MSAA=4, where the rendering is correct before and after.
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