Nice work.
On Tue, May 6, 2014 at 1:16 AM, Iago Toral Quiroga <ito...@igalia.com> wrote:
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index 6e74803..37d3eab 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -676,6 +676,13 @@ backend_instruction::reads_accumulator_implicitly() const
> }
>
> bool
> +backend_instruction::writes_accumulator_implicitly(int gen) const
> +{
> + return writes_accumulator ||
> + (gen < 6 && opcode >= BRW_OPCODE_ADD && opcode != BRW_OPCODE_NOP);
Since our virtual instruction opcodes are > BRW_OPCODE_NOP, they'll
also be classified as writing the accumulator, whereas before they
weren't.
I think the only ones (that are used on gen < 6) that generate
hardware instructions that write the accumulator are
FS_OPCODE_DDX
FS_OPCODE_DDY
FS_OPCODE_PIXEL_X
FS_OPCODE_PIXEL_Y
FS_OPCODE_CINTERP
FS_OPCODE_LINTERP
If you update this function with these and it still passes piglit on
gen < 6, then this patch is
Reviewed-by: Matt Turner <matts...@gmail.com>
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