On Thu, Aug 14, 2014 at 4:11 AM, Iago Toral Quiroga <ito...@igalia.com> wrote:
> In gen6 the geometry shader payload includes the PrimitiveID information in
> r0.1. When the shader code uses glPimitiveIdIn we will have to move this to
> a separate hardware register where we can map this attribute. This opcode
> takes the selected destination register and moves r0.1 there.
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 8 ++++++++
> src/mesa/drivers/dri/i965/brw_shader.cpp | 2 ++
> src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 17 +++++++++++++++++
> 4 files changed, 28 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
> b/src/mesa/drivers/dri/i965/brw_defines.h
> index f6bdaeb..b30a095 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -1032,6 +1032,14 @@ enum opcode {
> * - src1 is the number of primitives written.
> */
> GS_OPCODE_FF_SYNC,
> +
> + /**
> + * Move r0.1 (which holds PrimitiveID information in gen6) to a separate
> + * register.
> + *
> + * - dst is the GRF where PrimitiveID information will be moved.
> + */
> + GS_OPCODE_SET_PRIMITIVE_ID,
> };
>
> enum brw_urb_write_flags {
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index b927601..fc3146c 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -534,6 +534,8 @@ brw_instruction_name(enum opcode op)
> return "get_instance_id";
> case GS_OPCODE_FF_SYNC:
> return "ff_sync";
> + case GS_OPCODE_SET_PRIMITIVE_ID:
> + return "set_primitive_id";
>
> default:
> /* Yes, this leaks. It's in debug code, it should never occur, and if
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
> b/src/mesa/drivers/dri/i965/brw_vec4.h
> index ad3a77f..6e0da6d 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.h
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.h
> @@ -665,6 +665,7 @@ private:
> void generate_gs_ff_sync(struct brw_reg dst,
> struct brw_reg src0,
> struct brw_reg src1);
> + void generate_gs_set_primitive_id(struct brw_reg dst);
> void generate_oword_dual_block_offsets(struct brw_reg m1,
> struct brw_reg index);
> void generate_scratch_write(vec4_instruction *inst,
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> index 2bf2b67..8293f60 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> @@ -694,6 +694,19 @@ vec4_generator::generate_gs_ff_sync(struct brw_reg dst,
> }
>
> void
> +vec4_generator::generate_gs_set_primitive_id(struct brw_reg dst)
> +{
> + /* In gen6, PrimitiveID is delivered in R0.1 of the payload */
> + struct brw_reg src = brw_vec8_grf(0, 0);
> + brw_push_insn_state(p);
> + brw_set_default_mask_control(p, BRW_MASK_DISABLE);
> + brw_set_default_access_mode(p, BRW_ALIGN_1);
> + brw_MOV(p, get_element_ud(dst, 0), get_element_ud(src, 1));
> + brw_set_default_access_mode(p, BRW_ALIGN_16);
The pop below makes this unneeded, right?
18-20
Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
> + brw_pop_insn_state(p);
> +}
> +
> +void
> vec4_generator::generate_oword_dual_block_offsets(struct brw_reg m1,
> struct brw_reg index)
> {
> @@ -1283,6 +1296,10 @@
> vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
> generate_gs_ff_sync(dst, src[0], src[1]);
> break;
>
> + case GS_OPCODE_SET_PRIMITIVE_ID:
> + generate_gs_set_primitive_id(dst);
> + break;
> +
> case SHADER_OPCODE_SHADER_TIME_ADD:
> brw_shader_time_add(p, src[0],
> prog_data->base.binding_table.shader_time_start);
> --
> 1.9.1
>
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