Jordan Justen <jordan.l.jus...@intel.com> writes: > An *untested* update for d9cd982d556be560af3bcbcdaf62b6b93eb934a5. > > A similar change was needed for CS to allow the piglit test > tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test > to pass. > > I think the previous change will fix cases that write atomics, such as > atomicCounterIncrement, and this change will fix cases than only read > atomics, such as atomicCounter. > > Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com> > Cc: Ben Widawsky <b...@bwidawsk.net> > Cc: Francisco Jerez <curroje...@riseup.net> > --- > src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 24 ++++++++++++++++-------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > index c7f321f..951c0ba 100644 > --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > @@ -3042,9 +3042,6 @@ void > fs_visitor::emit_untyped_surface_read(unsigned surf_index, fs_reg dst, > fs_reg offset) > { > - bool uses_kill = > - (stage == MESA_SHADER_FRAGMENT) && > - ((brw_wm_prog_data*) this->prog_data)->uses_kill; > int reg_width = dispatch_width / 8; > > fs_reg *sources = ralloc_array(mem_ctx, fs_reg, 2); > @@ -3054,13 +3051,24 @@ fs_visitor::emit_untyped_surface_read(unsigned > surf_index, fs_reg dst, > emit(MOV(sources[0], fs_reg(0u))) > ->force_writemask_all = true; > > - if (uses_kill) { > - emit(MOV(component(sources[0], 7), brw_flag_reg(0, 1))) > - ->force_writemask_all = true; > + if (stage == MESA_SHADER_FRAGMENT) { > + if (((brw_wm_prog_data*)this->prog_data)->uses_kill) { > + emit(MOV(component(sources[0], 7), brw_flag_reg(0, 1))) > + ->force_writemask_all = true; > + } else { > + emit(MOV(component(sources[0], 7), > + retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UD))) > + ->force_writemask_all = true; > + } > } else { > + /* The execution mask is part of the side-band information sent > together with > + * the message payload to the data port. It's implicitly ANDed with > the sample > + * mask sent in the header to compute the actual set of channels that > execute > + * the atomic operation. > + */ > + assert(stage == MESA_SHADER_VERTEX); > emit(MOV(component(sources[0], 7), > - retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UD))) > - ->force_writemask_all = true; > + brw_imm_ud(0xff)))->force_writemask_all = true; > } > > /* Set the surface read offset. */ > -- > 2.1.4
Looks OK to me, Reviewed-by: Francisco Jerez <curroje...@riseup.net>
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