The vertical alignment is ignored in the surface state for 1D array
textures so we can tightly pack them.
I've run this through Piglit and it doesn't cause any regressions.
(This should probably be squashed into the patch entitled “i965/skl:
Fix the qpitch value”)
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 15a0eca..2969db0 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -323,11 +323,11 @@ brw_miptree_layout_texture_array(struct brw_context *brw,
brw_miptree_layout_2d(mt);
if (layout_1d) {
- physical_qpitch = mt->align_h;
+ physical_qpitch = 1;
/* When using the horizontal layout the qpitch specifies the distance in
* pixels between array slices.
*/
- mt->qpitch = physical_qpitch * mt->total_width;
+ mt->qpitch = mt->total_width;
} else if (brw->gen >= 9) {
GLenum base_format;
--
1.9.3
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