On Fri, Apr 17, 2015 at 7:11 PM, Jason Ekstrand <ja...@jlekstrand.net> wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_clip.c             |  2 +-
>  src/mesa/drivers/dri/i965/brw_clip_line.c        | 13 ++++++-------
>  src/mesa/drivers/dri/i965/brw_clip_tri.c         |  4 ++--
>  src/mesa/drivers/dri/i965/brw_clip_util.c        | 12 ++++--------
>  src/mesa/drivers/dri/i965/brw_eu.c               | 18 +++++++-----------
>  src/mesa/drivers/dri/i965/brw_eu.h               |  5 ++---
>  src/mesa/drivers/dri/i965/brw_eu_compact.c       |  4 ++--
>  src/mesa/drivers/dri/i965/brw_eu_emit.c          |  8 ++++----
>  src/mesa/drivers/dri/i965/brw_ff_gs.c            |  2 +-
>  src/mesa/drivers/dri/i965/brw_ff_gs_emit.c       | 12 +++---------
>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp   |  2 +-
>  src/mesa/drivers/dri/i965/brw_sf.c               |  2 +-
>  src/mesa/drivers/dri/i965/brw_sf_emit.c          |  6 ++----
>  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp |  2 +-
>  src/mesa/drivers/dri/i965/test_eu_compact.c      | 13 +++++--------
>  15 files changed, 42 insertions(+), 63 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_clip.c 
> b/src/mesa/drivers/dri/i965/brw_clip.c
> index 07b10a2..3aa79b5 100644
> --- a/src/mesa/drivers/dri/i965/brw_clip.c
> +++ b/src/mesa/drivers/dri/i965/brw_clip.c
> @@ -62,7 +62,7 @@ static void compile_clip_prog( struct brw_context *brw,
>
>     /* Begin the compilation:
>      */
> -   brw_init_compile(brw, &c.func, mem_ctx);
> +   brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
>
>     c.func.single_program_flow = 1;
>
> diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c 
> b/src/mesa/drivers/dri/i965/brw_clip_line.c
> index 070adba..395cd2f 100644
> --- a/src/mesa/drivers/dri/i965/brw_clip_line.c
> +++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
> @@ -45,7 +45,7 @@
>
>  static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
>  {
> -   struct brw_context *brw = c->func.brw;
> +   const struct brw_device_info *devinfo = c->func.devinfo;
>     GLuint i = 0,j;
>
>     /* Register usage is static, precompute here:
> @@ -89,7 +89,7 @@ static void brw_clip_line_alloc_regs( struct 
> brw_clip_compile *c )
>     c->reg.clipdistance_offset = retype(brw_vec1_grf(i, 1), 
> BRW_REGISTER_TYPE_W);
>     i++;
>
> -   if (brw->gen == 5) {
> +   if (devinfo->gen == 5) {
>        c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
>        i++;
>     }
> @@ -129,7 +129,6 @@ static void brw_clip_line_alloc_regs( struct 
> brw_clip_compile *c )
>  static void clip_and_emit_line( struct brw_clip_compile *c )
>  {
>     struct brw_compile *p = &c->func;
> -   struct brw_context *brw = p->brw;
>     struct brw_indirect vtx0     = brw_indirect(0, 0);
>     struct brw_indirect vtx1      = brw_indirect(1, 0);
>     struct brw_indirect newvtx0   = brw_indirect(2, 0);
> @@ -155,7 +154,7 @@ static void clip_and_emit_line( struct brw_clip_compile 
> *c )
>     brw_clip_init_clipmask(c);
>
>     /* -ve rhw workaround */
> -   if (brw->has_negative_rhw_bug) {
> +   if (p->devinfo->has_negative_rhw_bug) {
>        brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
>                brw_imm_ud(1<<20));
>        brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, 
> BRW_CONDITIONAL_NZ);
> @@ -213,7 +212,7 @@ static void clip_and_emit_line( struct brw_clip_compile 
> *c )
>                * Both can be negative on GM965/G965 due to RHW workaround
>                * if so, this object should be rejected.
>                */
> -             if (brw->has_negative_rhw_bug) {
> +             if (p->devinfo->has_negative_rhw_bug) {
>                   brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, 
> c->reg.dp0, brw_imm_f(0.0));
>                   brw_IF(p, BRW_EXECUTE_1);
>                   {
> @@ -239,7 +238,7 @@ static void clip_and_emit_line( struct brw_clip_compile 
> *c )
>
>               /* If both are positive, do nothing */
>               /* Only on GM965/G965 */
> -             if (brw->has_negative_rhw_bug) {
> +             if (p->devinfo->has_negative_rhw_bug) {
>                   brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, 
> c->reg.dp0, brw_imm_f(0.0));
>                   brw_IF(p, BRW_EXECUTE_1);
>               }
> @@ -255,7 +254,7 @@ static void clip_and_emit_line( struct brw_clip_compile 
> *c )
>                                             BRW_PREDICATE_NORMAL);
>               }
>
> -             if (brw->has_negative_rhw_bug) {
> +             if (p->devinfo->has_negative_rhw_bug) {
>                   brw_ENDIF(p);
>               }
>           }
> diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c 
> b/src/mesa/drivers/dri/i965/brw_clip_tri.c
> index d4babc9..ad5e588 100644
> --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
> +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
> @@ -50,7 +50,7 @@ static void release_tmps( struct brw_clip_compile *c )
>  void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
>                               GLuint nr_verts )
>  {
> -   struct brw_context *brw = c->func.brw;
> +   const struct brw_device_info *devinfo = c->func.devinfo;
>     GLuint i = 0,j;
>
>     /* Register usage is static, precompute here:
> @@ -123,7 +123,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
>     c->reg.clipdistance_offset = retype(brw_vec1_grf(i, 1), 
> BRW_REGISTER_TYPE_W);
>     i++;
>
> -   if (brw->gen == 5) {
> +   if (devinfo->gen == 5) {
>        c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
>        i++;
>     }
> diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c 
> b/src/mesa/drivers/dri/i965/brw_clip_util.c
> index ffd01dd..af2029b 100644
> --- a/src/mesa/drivers/dri/i965/brw_clip_util.c
> +++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
> @@ -417,7 +417,6 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
>  {
>     struct brw_compile *p = &c->func;
>     struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
> -   struct brw_context *brw = p->brw;
>
>     /* Shift so that lowest outcode bit is rightmost:
>      */
> @@ -429,7 +428,7 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
>        /* Rearrange userclip outcodes so that they come directly after
>         * the fixed plane bits.
>         */
> -      if (brw->gen == 5 || brw->is_g4x)
> +      if (p->devinfo->gen == 5 || p->devinfo->is_g4x)
>           brw_AND(p, tmp, incoming, brw_imm_ud(0xff<<14));
>        else
>           brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
> @@ -444,9 +443,8 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
>  void brw_clip_ff_sync(struct brw_clip_compile *c)
>  {
>      struct brw_compile *p = &c->func;
> -    struct brw_context *brw = p->brw;
>
> -    if (brw->gen == 5) {
> +    if (p->devinfo->gen == 5) {
>          brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
>          brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, 
> BRW_CONDITIONAL_Z);
>          brw_IF(p, BRW_EXECUTE_1);
> @@ -467,11 +465,9 @@ void brw_clip_ff_sync(struct brw_clip_compile *c)
>
>  void brw_clip_init_ff_sync(struct brw_clip_compile *c)
>  {
> -    struct brw_context *brw = c->func.brw;
> -
> -    if (brw->gen == 5) {
> -       struct brw_compile *p = &c->func;
> +    struct brw_compile *p = &c->func;
>
> +    if (p->devinfo->gen == 5) {
>          brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0));
>      }
>  }

I think this is a good example of my confusion. In the past, we've had
a brw variable in functions that took a brw_compile and not a
brw_context so that the programmer can just use brw without thinking
about it.

This series, and this patch in particular seems to be adding devinfo
variables sometimes and removing them other times. I'd prefer we just
added them when needed.
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