To further reduce churn when replacing the buffer object implementation, wrap the existing drm_intel_bo_reference/drm_intel_bo_unreference.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> --- src/mesa/drivers/dri/i965/brw_batch.h | 12 +++++++++++ src/mesa/drivers/dri/i965/brw_context.c | 25 +++++++--------------- src/mesa/drivers/dri/i965/brw_draw.c | 11 +++++----- src/mesa/drivers/dri/i965/brw_draw_upload.c | 10 ++++----- .../drivers/dri/i965/brw_performance_monitor.c | 8 +++---- src/mesa/drivers/dri/i965/brw_pipe_control.c | 5 ++--- src/mesa/drivers/dri/i965/brw_program.c | 4 ++-- src/mesa/drivers/dri/i965/brw_queryobj.c | 10 ++++----- src/mesa/drivers/dri/i965/brw_state_cache.c | 4 ++-- src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_queryobj.c | 4 ++-- src/mesa/drivers/dri/i965/gen6_sol.c | 4 ++-- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 17 ++++++--------- src/mesa/drivers/dri/i965/intel_buffer_objects.c | 14 ++++++------ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 ++++++----- src/mesa/drivers/dri/i965/intel_screen.c | 6 +++--- src/mesa/drivers/dri/i965/intel_syncobj.c | 10 ++++----- src/mesa/drivers/dri/i965/intel_upload.c | 7 +++--- 18 files changed, 78 insertions(+), 88 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_batch.h b/src/mesa/drivers/dri/i965/brw_batch.h index c05f9b0..5745aa4 100644 --- a/src/mesa/drivers/dri/i965/brw_batch.h +++ b/src/mesa/drivers/dri/i965/brw_batch.h @@ -66,6 +66,18 @@ typedef struct brw_batch { } saved; } brw_batch; +inline static brw_bo *brw_bo_get(brw_bo *bo) +{ + drm_intel_bo_reference(bo); + return bo; +} + +inline static void brw_bo_put(brw_bo *bo) +{ + if (bo) + drm_intel_bo_unreference(bo); +} + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 8b2d006..583ce7f 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -929,17 +929,11 @@ intelDestroyContext(__DRIcontext * driContextPriv) brw_destroy_state(brw); brw_draw_destroy(brw); - drm_intel_bo_unreference(brw->curbe.curbe_bo); - if (brw->vs.base.scratch_bo) - drm_intel_bo_unreference(brw->vs.base.scratch_bo); - if (brw->gs.base.scratch_bo) - drm_intel_bo_unreference(brw->gs.base.scratch_bo); - if (brw->wm.base.scratch_bo) - drm_intel_bo_unreference(brw->wm.base.scratch_bo); - - gen7_reset_hw_bt_pool_offsets(brw); - drm_intel_bo_unreference(brw->hw_bt_pool.bo); - brw->hw_bt_pool.bo = NULL; + brw_bo_put(brw->curbe.curbe_bo); + brw_bo_put(brw->vs.base.scratch_bo); + brw_bo_put(brw->gs.base.scratch_bo); + brw_bo_put(brw->wm.base.scratch_bo); + brw_bo_put(brw->hw_bt_pool.bo); drm_intel_gem_context_destroy(brw->hw_ctx); @@ -955,10 +949,8 @@ intelDestroyContext(__DRIcontext * driContextPriv) brw_fini_pipe_control(brw); intel_batchbuffer_free(brw); - drm_intel_bo_unreference(brw->throttle_batch[1]); - drm_intel_bo_unreference(brw->throttle_batch[0]); - brw->throttle_batch[1] = NULL; - brw->throttle_batch[0] = NULL; + brw_bo_put(brw->throttle_batch[1]); + brw_bo_put(brw->throttle_batch[0]); driDestroyOptionCache(&brw->optionCache); @@ -1402,6 +1394,7 @@ intel_process_dri2_buffer(struct brw_context *brw, intel_update_winsys_renderbuffer_miptree(brw, rb, bo, drawable->w, drawable->h, buffer->pitch); + brw_bo_put(bo); if (brw_is_front_buffer_drawing(fb) && (buffer->attachment == __DRI_BUFFER_FRONT_LEFT || @@ -1411,8 +1404,6 @@ intel_process_dri2_buffer(struct brw_context *brw, } assert(rb->mt); - - drm_intel_bo_unreference(bo); } /** diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 6dc0fd8..1aa0093 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -291,7 +291,7 @@ brw_merge_inputs(struct brw_context *brw, GLuint i; for (i = 0; i < brw->vb.nr_buffers; i++) { - drm_intel_bo_unreference(brw->vb.buffers[i].bo); + brw_bo_put(brw->vb.buffers[i].bo); brw->vb.buffers[i].bo = NULL; } brw->vb.nr_buffers = 0; @@ -482,13 +482,12 @@ brw_try_draw_prims(struct gl_context *ctx, brw->draw.gl_basevertex = prims[i].indexed ? prims[i].basevertex : prims[i].start; - drm_intel_bo_unreference(brw->draw.draw_params_bo); + brw_bo_put(brw->draw.draw_params_bo); if (prims[i].is_indirect) { /* Point draw_params_bo at the indirect buffer. */ brw->draw.draw_params_bo = - intel_buffer_object(ctx->DrawIndirectBuffer)->buffer; - drm_intel_bo_reference(brw->draw.draw_params_bo); + brw_bo_get(intel_buffer_object(ctx->DrawIndirectBuffer)->buffer); brw->draw.draw_params_offset = prims[i].indirect_offset + (prims[i].indexed ? 12 : 8); } else { @@ -629,7 +628,7 @@ brw_draw_destroy(struct brw_context *brw) int i; for (i = 0; i < brw->vb.nr_buffers; i++) { - drm_intel_bo_unreference(brw->vb.buffers[i].bo); + brw_bo_put(brw->vb.buffers[i].bo); brw->vb.buffers[i].bo = NULL; } brw->vb.nr_buffers = 0; @@ -639,6 +638,6 @@ brw_draw_destroy(struct brw_context *brw) } brw->vb.nr_enabled = 0; - drm_intel_bo_unreference(brw->ib.bo); + brw_bo_put(brw->ib.bo); brw->ib.bo = NULL; } diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 44e40f1..3627f95 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -479,9 +479,8 @@ brw_prepare_vertices(struct brw_context *brw) glarray->_ElementSize); } } - buffer->bo = intel_bufferobj_buffer(brw, intel_buffer, - offset, size); - drm_intel_bo_reference(buffer->bo); + buffer->bo = brw_bo_get(intel_bufferobj_buffer(brw, intel_buffer, + offset, size)); input->buffer = j++; input->offset = 0; @@ -910,9 +909,8 @@ brw_upload_indices(struct brw_context *brw) intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj), offset, ib_size); if (bo != brw->ib.bo) { - drm_intel_bo_unreference(brw->ib.bo); - brw->ib.bo = bo; - drm_intel_bo_reference(bo); + brw_bo_put(brw->ib.bo); + brw->ib.bo = brw_bo_get(bo); } } } diff --git a/src/mesa/drivers/dri/i965/brw_performance_monitor.c b/src/mesa/drivers/dri/i965/brw_performance_monitor.c index 12e3285..1afc968 100644 --- a/src/mesa/drivers/dri/i965/brw_performance_monitor.c +++ b/src/mesa/drivers/dri/i965/brw_performance_monitor.c @@ -624,7 +624,7 @@ gather_statistics_results(struct brw_context *brw, monitor->pipeline_stats_results[i] = end[i] - start[i]; } drm_intel_bo_unmap(monitor->pipeline_stats_bo); - drm_intel_bo_unreference(monitor->pipeline_stats_bo); + brw_bo_put(monitor->pipeline_stats_bo); monitor->pipeline_stats_bo = NULL; } @@ -957,7 +957,7 @@ gather_oa_results(struct brw_context *brw, * can free the monitor's OA BO. */ if (m->Ended) { - drm_intel_bo_unreference(monitor->oa_bo); + brw_bo_put(monitor->oa_bo); monitor->oa_bo = NULL; /* The monitor's OA result is now resolved. */ @@ -1061,7 +1061,7 @@ reinitialize_perf_monitor(struct brw_context *brw, struct brw_perf_monitor_object *monitor) { if (monitor->oa_bo) { - drm_intel_bo_unreference(monitor->oa_bo); + brw_bo_put(monitor->oa_bo); monitor->oa_bo = NULL; } @@ -1078,7 +1078,7 @@ reinitialize_perf_monitor(struct brw_context *brw, monitor->oa_results = NULL; if (monitor->pipeline_stats_bo) { - drm_intel_bo_unreference(monitor->pipeline_stats_bo); + brw_bo_put(monitor->pipeline_stats_bo); monitor->pipeline_stats_bo = NULL; } diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c index 36f74d6..1e5a3ba 100644 --- a/src/mesa/drivers/dri/i965/brw_pipe_control.c +++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c @@ -340,8 +340,7 @@ brw_init_pipe_control(struct brw_context *brw, * the gen6 workaround because it involves actually writing to * the buffer, and the kernel doesn't let us write to the batch. */ - brw->workaround_bo = brw->intelScreen->workaround_bo; - drm_intel_bo_reference(brw->workaround_bo); + brw->workaround_bo = brw_bo_get(brw->intelScreen->workaround_bo); brw->pipe_controls_since_last_cs_stall = 0; } @@ -349,5 +348,5 @@ brw_init_pipe_control(struct brw_context *brw, void brw_fini_pipe_control(struct brw_context *brw) { - drm_intel_bo_unreference(brw->workaround_bo); + brw_bo_put(brw->workaround_bo); } diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index c52a393..7dc3e8c 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -266,7 +266,7 @@ brw_get_scratch_bo(struct brw_context *brw, brw_bo *old_bo = *scratch_bo; if (old_bo && old_bo->size < size) { - drm_intel_bo_unreference(old_bo); + brw_bo_put(old_bo); old_bo = NULL; } @@ -531,7 +531,7 @@ brw_get_shader_time_index(struct brw_context *brw, void brw_destroy_shader_time(struct brw_context *brw) { - drm_intel_bo_unreference(brw->shader_time.bo); + brw_bo_put(brw->shader_time.bo); brw->shader_time.bo = NULL; } diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index cc68f17..344993e 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -164,7 +164,7 @@ brw_queryobj_get_results(struct gl_context *ctx, /* Now that we've processed the data stored in the query's buffer object, * we can release it. */ - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); query->bo = NULL; } @@ -196,7 +196,7 @@ brw_delete_query(struct gl_context *ctx, struct gl_query_object *q) { struct brw_query_object *query = (struct brw_query_object *)q; - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); free(query); } @@ -235,7 +235,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q) * obtain the time elapsed. Notably, this includes time elapsed while * the system was doing other work, such as running other applications. */ - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); query->bo = drm_intel_bo_alloc(brw->bufmgr, "timer query", 4096, 4096); brw_write_timestamp(brw, query->bo, 0); break; @@ -250,7 +250,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q) * Since we're starting a new query, we need to be sure to throw away * any previous occlusion query results. */ - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); query->bo = NULL; query->last_index = -1; @@ -479,7 +479,7 @@ brw_query_counter(struct gl_context *ctx, struct gl_query_object *q) assert(q->Target == GL_TIMESTAMP); - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); query->bo = drm_intel_bo_alloc(brw->bufmgr, "timestamp query", 4096, 4096); brw_write_timestamp(brw, query->bo, 0); diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index 7c1a6e3..48db407 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -188,7 +188,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size) if (brw->has_llc) drm_intel_bo_unmap(cache->bo); - drm_intel_bo_unreference(cache->bo); + brw_bo_put(cache->bo); cache->bo = new_bo; cache->bo_used_by_gpu = false; @@ -428,7 +428,7 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) if (brw->has_llc) drm_intel_bo_unmap(cache->bo); - drm_intel_bo_unreference(cache->bo); + brw_bo_put(cache->bo); cache->bo = NULL; brw_clear_cache(brw, cache); free(cache->items); diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c index b322db8..934a19d 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c @@ -96,7 +96,7 @@ brw_upload_pull_constants(struct brw_context *brw, brw_create_constant_surface(brw, const_bo, const_offset, size, &stage_state->surf_offset[surf_index], dword_pitch); - drm_intel_bo_unreference(const_bo); + brw_bo_put(const_bo); brw->ctx.NewDriverState |= brw_new_constbuf; } diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c b/src/mesa/drivers/dri/i965/gen6_queryobj.c index b34268e..b9269de 100644 --- a/src/mesa/drivers/dri/i965/gen6_queryobj.c +++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c @@ -259,7 +259,7 @@ gen6_queryobj_get_results(struct gl_context *ctx, /* Now that we've processed the data stored in the query's buffer object, * we can release it. */ - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); query->bo = NULL; query->Base.Ready = true; @@ -278,7 +278,7 @@ gen6_begin_query(struct gl_context *ctx, struct gl_query_object *q) struct brw_query_object *query = (struct brw_query_object *)q; /* Since we're starting a new query, we need to throw away old results. */ - drm_intel_bo_unreference(query->bo); + brw_bo_put(query->bo); query->bo = drm_intel_bo_alloc(brw->bufmgr, "query results", 4096, 4096); switch (query->Base.Target) { diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index f8fb389..47a18a1 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -222,8 +222,8 @@ brw_delete_transform_feedback(struct gl_context *ctx, _mesa_reference_buffer_object(ctx, &obj->Buffers[i], NULL); } - drm_intel_bo_unreference(brw_obj->offset_bo); - drm_intel_bo_unreference(brw_obj->prim_count_bo); + brw_bo_put(brw_obj->offset_bo); + brw_bo_put(brw_obj->prim_count_bo); free(brw_obj); } diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index ca65390..db9b761 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -56,10 +56,7 @@ intel_batchbuffer_init(struct brw_context *brw) static void intel_batchbuffer_reset(struct brw_context *brw) { - if (brw->batch.last_bo != NULL) { - drm_intel_bo_unreference(brw->batch.last_bo); - brw->batch.last_bo = NULL; - } + brw_bo_put(brw->batch.last_bo); brw->batch.last_bo = brw->batch.bo; brw_render_cache_set_clear(brw); @@ -104,8 +101,8 @@ void intel_batchbuffer_free(struct brw_context *brw) { free(brw->batch.cpu_map); - drm_intel_bo_unreference(brw->batch.last_bo); - drm_intel_bo_unreference(brw->batch.bo); + brw_bo_put(brw->batch.last_bo); + brw_bo_put(brw->batch.bo); } static void @@ -264,7 +261,7 @@ throttle(struct brw_context *brw) if (brw->throttle_batch[1]) { if (!brw->disable_throttling) drm_intel_bo_wait_rendering(brw->throttle_batch[1]); - drm_intel_bo_unreference(brw->throttle_batch[1]); + brw_bo_put(brw->throttle_batch[1]); } brw->throttle_batch[1] = brw->throttle_batch[0]; brw->throttle_batch[0] = NULL; @@ -353,10 +350,8 @@ _intel_batchbuffer_flush(struct brw_context *brw, if (USED_BATCH(brw->batch) == 0) return 0; - if (brw->throttle_batch[0] == NULL) { - brw->throttle_batch[0] = brw->batch.bo; - drm_intel_bo_reference(brw->throttle_batch[0]); - } + if (brw->throttle_batch[0] == NULL) + brw->throttle_batch[0] = brw_bo_get(brw->batch.bo); if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) { int bytes_for_commands = 4 * USED_BATCH(brw->batch); diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c index fec8743..be2c66b 100644 --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c @@ -118,7 +118,7 @@ alloc_buffer_object(struct brw_context *brw, static void release_buffer(struct intel_buffer_object *intel_obj) { - drm_intel_bo_unreference(intel_obj->buffer); + brw_bo_put(intel_obj->buffer); intel_obj->buffer = NULL; } @@ -165,7 +165,7 @@ brw_delete_buffer(struct gl_context * ctx, struct gl_buffer_object *obj) */ _mesa_buffer_unmap_all_mappings(ctx, obj); - drm_intel_bo_unreference(intel_obj->buffer); + brw_bo_put(intel_obj->buffer); free(intel_obj); } @@ -275,7 +275,7 @@ brw_buffer_subdata(struct gl_context *ctx, if (busy) { if (size == intel_obj->Base.Size) { /* Replace the current busy bo so the subdata doesn't stall. */ - drm_intel_bo_unreference(intel_obj->buffer); + brw_bo_put(intel_obj->buffer); alloc_buffer_object(brw, intel_obj); } else if (!intel_obj->prefer_stall_to_blit) { perf_debug("Using a blit copy to avoid stalling on " @@ -294,7 +294,7 @@ brw_buffer_subdata(struct gl_context *ctx, temp_bo, 0, size); - drm_intel_bo_unreference(temp_bo); + brw_bo_put(temp_bo); return; } else { perf_debug("Stalling on glBufferSubData(%ld, %ld) (%ldkb) to a busy " @@ -390,7 +390,7 @@ brw_map_buffer_range(struct gl_context *ctx, if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) { if (drm_intel_bo_references(brw->batch.bo, intel_obj->buffer)) { if (access & GL_MAP_INVALIDATE_BUFFER_BIT) { - drm_intel_bo_unreference(intel_obj->buffer); + brw_bo_put(intel_obj->buffer); alloc_buffer_object(brw, intel_obj); } else { perf_debug("Stalling on the GPU for mapping a busy buffer " @@ -399,7 +399,7 @@ brw_map_buffer_range(struct gl_context *ctx, } } else if (drm_intel_bo_busy(intel_obj->buffer) && (access & GL_MAP_INVALIDATE_BUFFER_BIT)) { - drm_intel_bo_unreference(intel_obj->buffer); + brw_bo_put(intel_obj->buffer); alloc_buffer_object(brw, intel_obj); } } @@ -561,7 +561,7 @@ brw_unmap_buffer(struct gl_context *ctx, */ brw_emit_mi_flush(brw); - drm_intel_bo_unreference(intel_obj->range_map_bo[index]); + brw_bo_put(intel_obj->range_map_bo[index]); intel_obj->range_map_bo[index] = NULL; } else if (intel_obj->buffer != NULL) { drm_intel_bo_unmap(intel_obj->buffer); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 59660c0..174649b 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -688,7 +688,7 @@ intel_miptree_create(struct brw_context *brw, mt->total_width, mt->total_height); mt->tiling = I915_TILING_X; - drm_intel_bo_unreference(mt->bo); + brw_bo_put(mt->bo); mt->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree", total_width, total_height, mt->cpp, &mt->tiling, &pitch, alloc_flags); @@ -769,8 +769,7 @@ intel_miptree_create_for_bo(struct brw_context *brw, if (!mt) return NULL; - drm_intel_bo_reference(bo); - mt->bo = bo; + mt->bo = brw_bo_get(bo); mt->pitch = pitch; mt->offset = offset; mt->tiling = tiling; @@ -925,13 +924,13 @@ intel_miptree_release(struct intel_mipmap_tree **mt) DBG("%s deleting %p\n", __func__, *mt); - drm_intel_bo_unreference((*mt)->bo); + brw_bo_put((*mt)->bo); intel_miptree_release(&(*mt)->stencil_mt); if ((*mt)->hiz_buf) { if ((*mt)->hiz_buf->mt) intel_miptree_release(&(*mt)->hiz_buf->mt); else - drm_intel_bo_unreference((*mt)->hiz_buf->bo); + brw_bo_put((*mt)->hiz_buf->bo); free((*mt)->hiz_buf); } intel_miptree_release(&(*mt)->mcs_mt); @@ -1581,7 +1580,7 @@ intel_gen7_hiz_buf_create(struct brw_context *brw, free(buf); return NULL; } else if (tiling != I915_TILING_Y) { - drm_intel_bo_unreference(buf->bo); + brw_bo_put(buf->bo); free(buf); return NULL; } @@ -1684,7 +1683,7 @@ intel_gen8_hiz_buf_create(struct brw_context *brw, free(buf); return NULL; } else if (tiling != I915_TILING_Y) { - drm_intel_bo_unreference(buf->bo); + brw_bo_put(buf->bo); free(buf); return NULL; } diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 1d7e244..b8e96be 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -366,7 +366,7 @@ intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image, drm_intel_bo_unreference(image->bo); image->bo = mt->bo; - drm_intel_bo_reference(mt->bo); + drm_intel_bo_reference(image->bo); } static __DRIimage * @@ -428,7 +428,7 @@ intel_create_image_from_renderbuffer(__DRIcontext *context, image->data = loaderPrivate; drm_intel_bo_unreference(image->bo); image->bo = irb->mt->bo; - drm_intel_bo_reference(irb->mt->bo); + drm_intel_bo_reference(image->bo); image->width = rb->Width; image->height = rb->Height; image->pitch = irb->mt->pitch; @@ -532,7 +532,7 @@ intel_create_image(__DRIscreen *screen, if (image == NULL) return NULL; - + cpp = _mesa_get_format_bytes(image->format); image->bo = drm_intel_bo_alloc_tiled(intelScreen->bufmgr, "image", width, height, cpp, &tiling, diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c b/src/mesa/drivers/dri/i965/intel_syncobj.c index 36fafd0..b05a741 100644 --- a/src/mesa/drivers/dri/i965/intel_syncobj.c +++ b/src/mesa/drivers/dri/i965/intel_syncobj.c @@ -58,8 +58,7 @@ struct intel_gl_sync_object { static void brw_fence_finish(struct brw_fence *fence) { - if (fence->batch_bo) - drm_intel_bo_unreference(fence->batch_bo); + brw_bo_put(fence->batch_bo); } static void @@ -69,8 +68,7 @@ brw_fence_insert(struct brw_context *brw, struct brw_fence *fence) assert(!fence->signalled); brw_emit_mi_flush(brw); - fence->batch_bo = brw->batch.bo; - drm_intel_bo_reference(fence->batch_bo); + fence->batch_bo = brw_bo_get(brw->batch.bo); intel_batchbuffer_flush(brw); } @@ -81,7 +79,7 @@ brw_fence_has_completed(struct brw_fence *fence) return true; if (fence->batch_bo && !drm_intel_bo_busy(fence->batch_bo)) { - drm_intel_bo_unreference(fence->batch_bo); + brw_bo_put(fence->batch_bo); fence->batch_bo = NULL; fence->signalled = true; return true; @@ -115,7 +113,7 @@ brw_fence_client_wait(struct brw_context *brw, struct brw_fence *fence, return false; fence->signalled = true; - drm_intel_bo_unreference(fence->batch_bo); + brw_bo_put(fence->batch_bo); fence->batch_bo = NULL; return true; diff --git a/src/mesa/drivers/dri/i965/intel_upload.c b/src/mesa/drivers/dri/i965/intel_upload.c index 2324a2c..f489b77 100644 --- a/src/mesa/drivers/dri/i965/intel_upload.c +++ b/src/mesa/drivers/dri/i965/intel_upload.c @@ -56,7 +56,7 @@ intel_upload_finish(struct brw_context *brw) return; drm_intel_bo_unmap(brw->upload.bo); - drm_intel_bo_unreference(brw->upload.bo); + brw_bo_put(brw->upload.bo); brw->upload.bo = NULL; brw->upload.next_offset = 0; } @@ -112,9 +112,8 @@ intel_upload_space(struct brw_context *brw, *out_offset = offset; if (*out_bo != brw->upload.bo) { - drm_intel_bo_unreference(*out_bo); - *out_bo = brw->upload.bo; - drm_intel_bo_reference(brw->upload.bo); + brw_bo_put(*out_bo); + *out_bo = brw_bo_get(brw->upload.bo); } return brw->upload.bo->virtual + offset; -- 2.5.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev