Chris Wilson <ch...@chris-wilson.co.uk> writes: > On Sun, Sep 06, 2015 at 06:12:40PM +0200, Francisco Jerez wrote: >> This stores the result of can_do_pipelined_register_writes() in the >> context struct so we can find out later whether LRI can be used to >> program the L3 configuration. > > LRI are whitelisted by their register. To be generic you must explicitly > test access to the register you want to modify. > -Chris > AFAIK except for the chicken bits used to enable L3 atomics on HSW (which is tested explicitly elsewhere, see PATCH 07), all other registers written to are whitelisted since command parser revision 1 -- I don't think that any released kernel version had the command parser enabled on Gen7 but any of the required registers blacklisted.
> -- > Chris Wilson, Intel Open Source Technology Centre
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