On 23.10.2015 23:26, srol...@vmware.com wrote:
From: Roland Scheidegger <srol...@vmware.com>
f16c intrinsic can only be emitted when AVX is used. So when we disable AVX
due to forcing 128bit vectors we must not use this intrinsic (depending on
llvm version, this worked previously because llvm used AVX even when we didn't
tell it to, however I've seen this fail with llvm 3.3 since
718249843b915decf8fccec92e466ac1a6219934 which seems to have the side effect
of disabling avx in llvm albeit it only touches sse flags really).
Possibly one day should actually try to use avx even with 128bit vectors...
Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com>
---
src/gallium/auxiliary/gallivm/lp_bld_init.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_init.c
b/src/gallium/auxiliary/gallivm/lp_bld_init.c
index 017d075..e6eede8 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_init.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_init.c
@@ -427,6 +427,7 @@ lp_build_init(void)
*/
util_cpu_caps.has_avx = 0;
util_cpu_caps.has_avx2 = 0;
+ util_cpu_caps.has_f16c = 0;
}
#ifdef PIPE_ARCH_PPC_64
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