On Tue, Mar 30, 2010 at 8:37 AM, Luca Barbieri <luca.barbi...@gmail.com> wrote: >> Another idea was to convert TGSI to a SSA form. That would make unrolling >> branches much easier as the Phi function would basically become a linear >> interpolation, loops and subroutines with conditional return statements >> might be trickier. The r300 compiler already uses SSA for its optimization >> passes so maybe you wouldn't need to mess with TGSI that much... >> >>> >>> Is the conditional translation something that only needs to be done >>> in the Gallium drivers, or would it be useful to apply the translation >>> before the Mesa IR is converted into TGSI? Are any of the other drivers >>> (Gallium or Mesa) currently doing this kind of translation? >> >> Not that I know of. You may do it wherever you want theoretically, even in >> the r300 compiler and leaving TGSI untouched, but I think most people would >> appreciate if these translation were done in TGSI. > > It would be nice to have a driver-independent TGSI optimization module. > It could either operate directly on TGSI (probably only good for > simple optimization), or convert to LLVM IR, optimize, and convert > back. > > This would allow to use this for all drivers: note that at least > inlining and loop unrolling should generally be performed even for > hardware with full control flow support. > Lots of other optimizations would then be possible (using LLVM, with a > single line of code to request the appropriate LLVM pass), and would > automatically be available for all drivers, instead of being only > available for r300 by putting them in the radeon compiler.
This is orthogonal to the suggested project... -- When the facts change, I change my mind. What do you do, sir? ~ Keynes Corbin Simpson <mostawesomed...@gmail.com> ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ Mesa3d-dev mailing list Mesa3d-dev@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mesa3d-dev
