> -----Original Message----- > From: meta-xilinx-boun...@yoctoproject.org [mailto:meta-xilinx- > boun...@yoctoproject.org] On Behalf Of Giordon Stark > Sent: Wednesday, December 06, 2017 9:26 AM > To: meta-xilinx@yoctoproject.org > Cc: Tang, Shaochun <st...@bnl.gov> > Subject: [meta-xilinx] Wrong DRAM set for custom board using FSBL + u-boot? > > Hi all, > > The board I'm using is defined here: https://github.com/kratsg/meta- > l1calo/blob/master/conf/machine/gfex-prototype3.conf but I'm noticing that the > DRAM reported by U-Boot is set to 4 GiB. This would be correct for ZCU102, > but we > have 16 GiB DRAM for our custom (v3) board. > > Where is this setting configured? Is it part of the device tree? If so, why > is the device- > tree-xlnx repository not exporting this correctly? >
Does the device-tree generated indicate it as 16G? If your HDF has correct settings for 16G, DTG should output correct fragment in the dts/dtsi files. You should compile the u-boot code with this dtb. > Thanks! > > Giordon -- _______________________________________________ meta-xilinx mailing list meta-xilinx@yoctoproject.org https://lists.yoctoproject.org/listinfo/meta-xilinx
