On the 7-series, SD performance is as usual:

# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
20+0 records in
20+0 records out
20971520 bytes (20.0MB) copied, 0.997935 seconds, 20.0MB/s


I did notice that even on the 7 series programming the FPGA from Linux (using 
fpga-manager framework) is broken in the 2018.3 release now:

fpga_manager fpga0: writing fpga.bin to Xilinx Zynq FPGA Manager
fpga_manager fpga0: Error after writing image data to FPGA


On 21-03-19 18:08, Mike Looijmans wrote:
> Have only tried the MPSoC.
> 
> I haven't tried the 7k yet with 2018.3, may get to that tomorrow. I
> suspect it's something with the PMU interface and/or clock dividers.
> 
> 
> On 21-03-19 17:54, Peter Smith wrote:
>> Mike, although I have not made any measurements I have noticed in the
>> last few days (coincidentally I have been doing a lot of work with a
>> ZCU102) that the SD interface seemed a bit slow. Are you seeing this on
>> Zynq 7K or US+ MPSoC?
>> Best Regards
>> Peter
>>
>>
>> On Thu, 21 Mar 2019 at 16:38, Mike Looijmans <mike.looijm...@topic.nl
>> <mailto:mike.looijm...@topic.nl>> wrote:
>>
>>      The SD and eMMC controller has become terribly slow in 2018.3:
>>
>>      # echo 3 > /proc/sys/vm/drop_caches
>>
>>      # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
>>      20+0 records in
>>      20+0 records out
>>      20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
>>
>>      # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
>>      20+0 records in
>>      20+0 records out
>>      20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
>>
>>
>>      This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s
>>      for the
>>      SD card (mmcblk0) with the 2018.1 kernel and bootloader.
>>
>>      This is only in Linux, the bootloader still reads at about 10MB/s
>>      from the SD
>>      card. So apparently the clocks are set up okay.
>>
>>      According to the kernel, the clocks and interface are running at
>>      full speed:
>>
>>      # cat /sys/kernel/debug/mmc0/ios
>>      clock:          200000000 Hz
>>      actual clock:   200000000 Hz
>>      vdd:            21 (3.3 ~ 3.4 V)
>>      bus mode:       2 (push-pull)
>>      chip select:    0 (don't care)
>>      power mode:     2 (on)
>>      bus width:      3 (8 bits)
>>      timing spec:    9 (mmc HS200)
>>      signal voltage: 1 (1.80 V)
>>      driver type:    0 (driver type B)
>>
>>      # cat /sys/kernel/debug/mmc1/ios
>>      clock:          50000000 Hz
>>      actual clock:   50000000 Hz
>>      vdd:            21 (3.3 ~ 3.4 V)
>>      bus mode:       2 (push-pull)
>>      chip select:    0 (don't care)
>>      power mode:     2 (on)
>>      bus width:      2 (4 bits)
>>      timing spec:    2 (sd high-speed)
>>      signal voltage: 0 (3.30 V)
>>      driver type:    0 (driver type B)
>>
>>
>>      Any insights?
>>      --
>>      _______________________________________________
>>      meta-xilinx mailing list
>>      meta-xilinx@yoctoproject.org <mailto:meta-xilinx@yoctoproject.org>
>>      https://lists.yoctoproject.org/listinfo/meta-xilinx
>>
> 
> 

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