Chris Knadle wrote:
On Saturday, February 16, 2013  14:56:33, Adam wrote:
> In the case you mention for BAL (S/360/370/390 assembly), I'm
> guessing that there was no CPU instruction available for PUSH and
POP

Yep, at least none I knew of. A consequence of this is that it also didn't have "call subroutine" and "return from subroutine" instructions which would save and retrieve the IP from the stack.

and that the way you "faked" it  was via indirect memory
addressing and updating a "variable" (a  memory location) to contain
> the current "pointer" into the indirect-addressed memory.

Exactly. I also had to remember to have the recursive subroutine store its local variables on the "stack", instead of the equivalent of DEFB, DEFW, etc.

Recursion is usually limited to  certain kinds of jobs that naturally
lend themselves to recursive solutions.

Usually, yes, although I once heard someone (may have been my Pascal instructor) say something like "Anything that can be done with nested loops can be done with recursion". (I'm not sure I got that right!) My second C program (after "hello, world"), a fairly simple thing to list all the alphabetic combinations corresponding to a numeric telephone number, intentionally was done with recursion instead of a loop.

For instance -- solving an
NxN matrix determinant --  that's something that lends itself to a
> recursive solution, because any NxN matrix determinant can be broken
> down into 2x2 determinants. [This is a fun exercise.]

That sounds familiar -- I /might/ have done that in high school using APL.

Any guesses,  anybody, on whether some future programs are going
>>>> to be written to take advantage of multiple cores?
>>>
>>> Speculation is heavy in this area, because we've essentially hit
>>> a speed limit on CPUs
>>
>> Why is that? Speed of electricity? Heat?
> Both and then some. Bottom line: limitations of known physics.
>
> To try to deal with the heat issue, voltages that the processors use
> have been incrementally lowered. Many CPUs these days run on ~1.25v.
> (I think this is considered LVCMOS.) This gets into limitations on
> the voltage thresholds for what a "1" and a "0" are.
>
>> That 0.7v drop?
> More like 0.2v - 0.5v these days, but yes.

What materials are they using for those?

The actual "results" you get  from different CPUs differs depending on
> the architecture though. There have been various tricks used over
> the years to get more out of the CPU without increasing the clock
> rate. Instruction sets (CISC vs RISC), instruction pre-fetching and
> branch anticipation, pipelining, etc.

Sounds like Moore's Law is going to be less applicable, though, as the rate of increase of processing speed comes closer to some absolute limit.

Adam

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