Another link:
https://connect.microsoft.com/VisualStudio/feedback/details/805738/visual-studio-2013-c-compiler-considers-unaligned-avx-data
> Bill [MSFT] 13.05.2014
> This is by design. With /arch:AVX the default for vector memory access is
unaligned.
2015-09-24 11:26 GMT+02:00 Carl Kleffner <cmkleff...@gmail.com>:
> "Intel® Architecture Instruction Set Extensions Programming Reference"
> lists the SIMD instructions with explicit 32 byte alignment requirements:
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
> *Table 2-6. SIMD Instructions Requiring Explicitly Aligned MemoryRequire
> 32-byte alignmentVMOVDQA ymm, m256VMOVDQA m256, ymmVMOVAPS ymm,
> m256VMOVAPS m256, ymmVMOVAPD ymm, m256VMOVAPD m256, ymmVMOVNTPS
> m256, ymmVMOVNTPD m256, ymmVMOVNTDQ m256, ymmVMOVNTDQA ymm, m25*
> see:
> https://software.intel.com/sites/default/files/m/d/4/1/d/8/Intro_to_Intel_AVX.pdf
> and
> https://software.intel.com/en-us/intel-architecture-instruction-set-extensions-programming-reference
> (p. 2-10 Ref. # 319433-023)
>
> a wild guess: MSVC avoids these instructions
>
>
> 2015-09-24 3:35 GMT+02:00 NightStrike <nightstr...@gmail.com>:
>
>> Isn't this that?
>>
>> https://msdn.microsoft.com/en-us/library/jj620901.aspx
>>
>>
>> On Thu, Sep 17, 2015 at 1:56 PM, Kai Tietz <ktiet...@googlemail.com>
>> wrote:
>> > It doesn't. At least not as compiler-builtin.
>> >
>> > 2015-09-17 19:47 GMT+02:00 NightStrike <nightstr...@gmail.com>:
>> >> How does visual studio support AVX?
>> >>
>> >> On Sep 12, 2015 6:40 AM, "Kai Tietz" <ktiet...@googlemail.com> wrote:
>> >>>
>> >>> Hello,
>> >>>
>> >>> first thanks for interesting in this subject, but sadly I have
>> >>> disappoint you about it, I fear. The cause for the inability to align
>> >>> to 32-byte alignment is neither to seek in gcc, nor in mingw-w64
>> >>> itself. It is a consequence of the SEH-information required by the
>> >>> x64 ABI (see here as reference either msdn, or ibm's IA64
>> >>> exception-specification). Sadly there is no way to express by it any
>> >>> kind of stack-alignment. So it is impossible to write code, which
>> >>> brings AVX to proper stack-location within x64-ABI. The ABI itself
>> >>> makes sure that on function-entry stack has a 16-byte alignment, so
>> >>> 64-bit sse-registers can be stored aligned. Another weakness in this
>> >>> prologue-description used by x64 is that register with more then
>> >>> 64-bit width can't be expressed. This is a reason why the upper 8
>> >>> bytes of a ymm-register are treated as volatile.
>> >>>
>> >>> Only way to work-a-round that is to do manual alignment of function,
>> >>> and making sure that you won't try to unwind over such a function.
>> >>> The mentioned prologue/epilogue script on stack-overflow article seems
>> >>> to do exactly this.
>> >>>
>> >>> Regards,
>> >>> Kai Tietz
>> >>>
>> >>> 2015-09-11 23:53 GMT+02:00 Gabe Al-Ghalith <algh0...@umn.edu>:
>> >>> > Please see:
>> >>> >
>> >>> >
>> http://stackoverflow.com/questions/5983389/how-to-align-stack-at-32-byte-boundary-in-gcc
>> >>> >
>> >>> > and
>> >>> >
>> >>> >
>> http://stackoverflow.com/questions/32213338/gcc-vector-extensions-avx2-builtin-shuffle-crashes-when-m64-is-used
>> >>> >
>> >>> > Basically, AVX (since 2011) and now Skylake Xeon (with AVX-512)
>> will be
>> >>> > completely unusable on Windows. Please fix this!
>> >>> >
>> >>> > Thanks,
>> >>> > Gabe
>> >>> >
>> >>> >
>> >>> >
>> ------------------------------------------------------------------------------
>> >>> >
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>> >>> >
>> >>>
>> >>>
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