On Tue, Sep 08, 2015 at 09:38:23PM +0000, Paul Levlin wrote:
> Trying to install OpenBSD on a Netgate RCC-DFF 2220 system, but
> it seems like the Intel I354 interface has trouble initializing.
>
> I've tried 5.7-release and -current, both show the same output
> while attempting to initialize.
>
> As the I354 is listed in the supported adapters for em(4), I'm
> hoping it's a simple bug that I'd be happy to verify a fix for.
>
> Pointers to how to provide better debug info for the devs
>
> in this case (if needed) are also appreciated.
>
> If I'm barking up the wrong tree, I'd be happy for a reality check
> too..
em supports the I354 mac but not every phy that can be hooked
up to it. It seems likely that the 88E1514 phys in that board
have the same ids as the 88E1512 phy. In which case the following
may help:
Index: if_em_hw.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_em_hw.c,v
retrieving revision 1.87
diff -u -p -r1.87 if_em_hw.c
--- if_em_hw.c 5 Aug 2015 18:31:14 -0000 1.87
+++ if_em_hw.c 9 Sep 2015 04:29:33 -0000
@@ -182,7 +182,7 @@ int32_t em_get_pcs_speed_and_duplex_825
int32_t em_set_eee_i350(struct em_hw *);
int32_t em_set_eee_pchlan(struct em_hw *);
int32_t em_valid_nvm_bank_detect_ich8lan(struct em_hw *,
uint32_t *);
-
+int32_t em_initialize_M88E1512_phy(struct em_hw *);
/* IGP cable length table */
static const uint16_t
@@ -229,6 +229,7 @@ em_set_phy_type(struct em_hw *hw)
case M88E1111_I_PHY_ID:
case M88E1112_E_PHY_ID:
case M88E1543_E_PHY_ID:
+ case M88E1512_E_PHY_ID:
case I210_I_PHY_ID:
case I347AT4_E_PHY_ID:
hw->phy_type = em_phy_m88;
@@ -5272,6 +5273,12 @@ em_phy_reset(struct em_hw *hw)
em_gate_hw_phy_config_ich8lan(hw, FALSE);
}
+ if (hw->phy_id == M88E1512_E_PHY_ID) {
+ ret_val = em_initialize_M88E1512_phy(hw);
+ if (ret_val)
+ return ret_val;
+ }
+
return E1000_SUCCESS;
}
@@ -5410,7 +5417,8 @@ em_match_gig_phy(struct em_hw *hw)
hw->phy_id == I347AT4_E_PHY_ID ||
hw->phy_id == I350_I_PHY_ID ||
hw->phy_id == M88E1112_E_PHY_ID ||
- hw->phy_id == M88E1543_E_PHY_ID) {
+ hw->phy_id == M88E1543_E_PHY_ID ||
+ hw->phy_id == M88E1512_E_PHY_ID) {
uint32_t mdic;
mdic = EM_READ_REG(hw, E1000_MDICNFG);
@@ -10894,5 +10902,94 @@ em_set_eee_pchlan(struct em_hw *hw)
ret_val = em_write_phy_reg(hw, I82579_LPI_CTRL, phy_reg);
out:
return ret_val;
+}
+
+/**
+ * em_initialize_M88E1512_phy - Initialize M88E1512 PHY
+ * @hw: pointer to the HW structure
+ *
+ * Initialize Marvell 1512 to work correctly with Avoton.
+ **/
+int32_t
+em_initialize_M88E1512_phy(struct em_hw *hw)
+{
+ int32_t ret_val = E1000_SUCCESS;
+
+ DEBUGFUNC("e1000_initialize_M88E1512_phy");
+
+ /* Check if this is correct PHY. */
+ if (hw->phy_id != M88E1512_E_PHY_ID)
+ goto out;
+
+ /* Switch to PHY page 0xFF. */
+ ret_val = em_write_phy_reg(hw, M88E1543_PAGE_ADDR, 0x00FF);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_2, 0x214B);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_1, 0x2144);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_2, 0x0C28);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_1, 0x2146);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_2, 0xB233);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_1, 0x214D);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_2, 0xCC0C);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_1, 0x2159);
+ if (ret_val)
+ goto out;
+
+ /* Switch to PHY page 0xFB. */
+ ret_val = em_write_phy_reg(hw, M88E1543_PAGE_ADDR, 0x00FB);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_write_phy_reg(hw, M88E1512_CFG_REG_3, 0x000D);
+ if (ret_val)
+ goto out;
+
+ /* Switch to PHY page 0x12. */
+ ret_val = em_write_phy_reg(hw, M88E1543_PAGE_ADDR, 0x12);
+ if (ret_val)
+ goto out;
+
+ /* Change mode to SGMII-to-Copper */
+ ret_val = em_write_phy_reg(hw, M88E1512_MODE, 0x8001);
+ if (ret_val)
+ goto out;
+
+ /* Return the PHY to page 0. */
+ ret_val = em_write_phy_reg(hw, M88E1543_PAGE_ADDR, 0);
+ if (ret_val)
+ goto out;
+
+ ret_val = em_phy_hw_reset(hw);
+ if (ret_val) {
+ DEBUGOUT("Error committing the PHY changes\n");
+ return ret_val;
+ }
+
+ msec_delay(1000);
+out:
+ return ret_val;
}
Index: if_em_hw.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_em_hw.h,v
retrieving revision 1.66
diff -u -p -r1.66 if_em_hw.h
--- if_em_hw.h 5 Aug 2015 18:31:14 -0000 1.66
+++ if_em_hw.h 9 Sep 2015 04:31:58 -0000
@@ -2802,6 +2802,15 @@ struct em_host_command_info {
#define M88E1000_PHY_VCO_REG_BIT8 0x100 /* Bits 8 & 11 are adjusted for */
#define M88E1000_PHY_VCO_REG_BIT11 0x800 /* improved BER performance */
+#define M88E1543_PAGE_ADDR 0x16 /* Page Offset Register */
+#define M88E1543_EEE_CTRL_1 0x0
+#define M88E1543_EEE_CTRL_1_MS 0x0001 /* EEE Master/Slave */
+
+#define M88E1512_CFG_REG_1 0x0010
+#define M88E1512_CFG_REG_2 0x0011
+#define M88E1512_CFG_REG_3 0x0007
+#define M88E1512_MODE 0x0014
+
/* BME1000 PHY Specific Control Register */
#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */
#define BM_PHY_PAGE_SELECT 22 /* Page Select for BM */
@@ -3424,6 +3433,7 @@ struct em_host_command_info {
#define I210_I_PHY_ID 0x01410C00
#define IGP04E1000_E_PHY_ID 0x02A80391
#define M88E1141_E_PHY_ID 0x01410CD0
+#define M88E1512_E_PHY_ID 0x01410DD0
/* Bits...
* 15-5: page
