On 2022-02-10, Mihai Popescu <mih...@gmail.com> wrote: >> ... gaps ... > > What gaps are you referring to? The ones in dmesg for Intel in OP?
in Hrvoje's dmesg for AMD. > Also the smt is from simultaneous multithreading? yes (hyperthreading on Intel CPUs), these are what are disabled by the default setting hw.smt=0 on amd64 (i.e. only one of the detected "cpu"s is used per core) https://marc.info/?l=openbsd-cvs&m=152943660103446&w=2
