Hi misc,
I'm toying with SMM with the prospect to write a correct (read: not
depending on some useless firmware magic) driver for battery threshold
setting for thinkpads. Right now I need to flip the D_OPEN flag of the
northbridge, but I'm unsure about the ordering of the bytes in the PCI
subsystem
this is the code I use to access the config space (chipset's an I915M) :
> iodata.pi_sel.pc_bus = 0;
> iodata.pi_sel.pc_dev = 0;
> iodata.pi_sel.pc_func = 0;
> iodata.pi_reg = 0x9C;
> iodata.pi_width = 4;
> iodata.pi_data = 0;
>
> if (ioctl(pcifd, PCIOCREAD, &iodata) == -1)
> warn("problem while doing ioctl on /dev/pci");
>
> printf("%#x\n", iodata.pi_data);
this is what it prints :
> 0x391a20
this is the output of pcidump -xx 0:0:0
> Domain /dev/pci:
> 0:0:0: Intel 82915GM Host
> 0x0000: 25908086 20900106 06000003 00000000
> [...]
> 0x0080: 00000000 00000000 00000000 00000000
> 0x0090: 01111110 00111130 00000000 00391a20
> 0x00a0: 00000000 00000000 00000000 00000000
which is coherent with what my code displays
now, the I915 doc says that the VID is at offset 00h, and that the DID
is at 02h, and that their values are 8086h and 2590 respectively. I'll
let you check that on the dump above, theses values are interverted
...
Is that to say the offset 0x9D is on the lightest byte of the value I fetch ?
Cheers,
--
Vincent Gross
"So, the essence of XML is this: the problem it solves is not hard, and
it does not solve the problem well." -- Jerome Simeon & Phil Wadler
