Author: zoltan
Date: 2005-11-27 16:59:45 -0500 (Sun, 27 Nov 2005)
New Revision: 53531
Modified:
branches/vargaz/mini-linear-il/mono/mono/mini/cpu-amd64.md
branches/vargaz/mini-linear-il/mono/mono/mini/method-to-ir.c
branches/vargaz/mini-linear-il/mono/mono/mini/mini-amd64.c
branches/vargaz/mini-linear-il/mono/mono/mini/mini-ops.h
branches/vargaz/mini-linear-il/mono/mono/mini/mini.c
branches/vargaz/mini-linear-il/mono/mono/mini/mini.h
Log:
Ongoing work.
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/cpu-amd64.md
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/cpu-amd64.md 2005-11-27
21:30:40 UTC (rev 53530)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/cpu-amd64.md 2005-11-27
21:59:45 UTC (rev 53531)
@@ -82,6 +82,7 @@
stind.i4: src1:b src2:i
stind.r4: dest:f src1:b
stind.r8: dest:f src1:b
+
add: dest:i src1:i src2:i len:3 clob:1
sub: dest:i src1:i src2:i len:3 clob:1
mul: dest:i src1:i src2:i len:4 clob:1
@@ -96,6 +97,31 @@
shr: dest:i src1:i src2:s clob:1 len:3
shr.un: dest:i src1:i src2:s clob:1 len:3
+long_add: dest:i src1:i src2:i len:3 clob:1
+long_sub: dest:i src1:i src2:i len:3 clob:1
+long_mul: dest:i src1:i src2:i len:4 clob:1
+long_div: dest:a src1:a src2:i len:16 clob:d
+long_div_un: dest:a src1:a src2:i len:16 clob:d
+long_rem: dest:d src1:a src2:i len:16 clob:a
+long_rem_un: dest:d src1:a src2:i len:16 clob:a
+long_and: dest:i src1:i src2:i len:3 clob:1
+long_or: dest:i src1:i src2:i len:3 clob:1
+long_xor: dest:i src1:i src2:i len:3 clob:1
+long_shl: dest:i src1:i src2:s clob:1 len:3
+long_shr: dest:i src1:i src2:s clob:1 len:3
+long_shr_un: dest:i src1:i src2:s clob:1 len:3
+
+neg: dest:i src1:i len:3 clob:1
+not: dest:i src1:i len:3 clob:1
+conv.i1: dest:i src1:i len:4
+conv.i2: dest:i src1:i len:4
+conv.i4: dest:i src1:i len:3
+conv.i8: dest:i src1:i len:3
+conv.r4: dest:f src1:i len:9
+conv.r8: dest:f src1:i len:9
+conv.u4: dest:i src1:i len:3
+conv.u8: dest:i src1:i len:3
+
int_neg: dest:i src1:i len:3 clob:1
int_not: dest:i src1:i len:3 clob:1
int_conv_to_i1: dest:i src1:i len:4
@@ -107,6 +133,19 @@
int_conv_to_u4: dest:i src1:i len:3
int_conv_to_u8: dest:i src1:i len:3
+long_neg: dest:i src1:i len:3 clob:1
+long_not: dest:i src1:i len:3 clob:1
+long_conv_to_i1: dest:i src1:i len:4
+long_conv_to_u1: dest:i src1:i len:4
+long_conv_to_i2: dest:i src1:i len:4
+long_conv_to_u2: dest:i src1:i len:4
+long_conv_to_i4: dest:i src1:i len:3
+long_conv_to_i8: dest:i src1:i len:3
+long_conv_to_r4: dest:f src1:i len:9
+long_conv_to_r8: dest:f src1:i len:9
+long_conv_to_u4: dest:i src1:i len:3
+long_conv_to_u8: dest:i src1:i len:3
+
throw: src1:i len:18
op_rethrow: src1:i len:18
conv.ovf.i4.un: dest:i src1:i len:16
@@ -136,6 +175,7 @@
lcompare: src1:i src2:i len:3
icompare: src1:i src2:i len:3
compare_imm: src1:i len:13
+lcompare_imm: src1:i len:13
icompare_imm: src1:i len:8
fcompare: src1:f src2:f clob:a len:13
oparglist: src1:b len:11
@@ -237,21 +277,11 @@
cond_exc_ic: len:8
cond_exc_inc: len:8
-long_mul: dest:i src1:i src2:i clob:1 len:4
-long_mul_imm: dest:i src1:i clob:1 len:12
-long_div: dest:a src1:a src2:i len:16 clob:d
-long_div_un: dest:a src1:a src2:i len:16 clob:d
-long_rem: dest:d src1:a src2:i len:16 clob:a
-long_rem_un: dest:d src1:a src2:i len:16 clob:a
-long_shl: dest:i src1:i src2:s clob:1 len:31
-long_shr: dest:i src1:i src2:s clob:1 len:32
-long_shr_un: dest:i src1:i src2:s clob:1 len:32
-long_conv_to_r4: dest:f src1:i len:8
-long_conv_to_r8: dest:f src1:i len:8
long_conv_to_ovf_i: dest:i src1:i src2:i len:40
long_mul_ovf: dest:i src1:i src2:i clob:1 len:16
long_mul_ovf_un: dest:i src1:i src2:i len:22
long_conv_to_r_un: dest:f src1:i src2:i len:48
+long_mul_imm: dest:i src1:i clob:1 len:12
long_shr_imm: dest:i src1:i clob:1 len:11
long_shr_un_imm: dest:i src1:i clob:1 len:11
long_shl_imm: dest:i src1:i clob:1 len:11
@@ -260,7 +290,7 @@
float_blt: len:13
float_blt_un: len:30
float_bgt: len:13
-float_btg_un: len:30
+float_bgt_un: len:30
float_bge: len:32
float_bge_un: len:13
float_ble: len:32
@@ -274,6 +304,7 @@
float_rem_un: dest:f src1:f src2:f len:19
float_neg: dest:f src1:f len:23
float_not: dest:f src1:f len:3
+
float_conv_to_i1: dest:i src1:f len:49
float_conv_to_i2: dest:i src1:f len:49
float_conv_to_i4: dest:i src1:f len:49
@@ -284,7 +315,9 @@
float_conv_to_u1: dest:i src1:f len:49
float_conv_to_i: dest:i src1:f len:49
float_conv_to_ovf_i: dest:a src1:f len:40
-float_conv_to_ovd_u: dest:a src1:f len:40
+float_conv_to_r4: dest:f src1:f
+float_conv_to_r8: dest:f src1:f
+
float_mul_ovf:
float_ceq: dest:i src1:f src2:f len:35
float_cgt: dest:i src1:f src2:f len:35
@@ -410,3 +443,18 @@
int_ble: len:64
int_ble_un: len:64
+long_ceq: dest:c len:64
+long_cgt: dest:c len:64
+long_cgt_un: dest:c len:64
+long_clt: dest:c len:64
+long_clt_un: dest:c len:64
+long_beq: len:64
+long_bne_un: len:64
+long_blt: len:64
+long_blt_un: len:64
+long_bgt: len:64
+long_bgt_un: len:64
+long_bge: len:64
+long_bge_un: len:64
+long_ble: len:64
+long_ble_un: len:64
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/method-to-ir.c
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/method-to-ir.c
2005-11-27 21:30:40 UTC (rev 53530)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/method-to-ir.c
2005-11-27 21:59:45 UTC (rev 53531)
@@ -341,6 +341,15 @@
mono_bblock_add_inst (cfg->cbb, inst); \
} while (0)
+#define MONO_EMIT_NEW_BIALU(cfg,op,dr,sr1,sr2) do { \
+ MonoInst *inst; \
+ MONO_INST_NEW ((cfg), (inst), (op)); \
+ inst->dreg = dr; \
+ inst->sreg1 = sr1; \
+ inst->sreg2 = sr2; \
+ mono_bblock_add_inst (cfg->cbb, inst); \
+ } while (0)
+
#define MONO_EMIT_NEW_BIALU_IMM(cfg,op,dr,sr,imm) do { \
MonoInst *inst; \
MONO_INST_NEW ((cfg), (inst), (op)); \
@@ -675,7 +684,9 @@
type_from_op (cmp, sp [0], sp [1]); \
CHECK_TYPE (cmp); \
MONO_ADD_INS (bblock, cmp); \
+ printf ("D: %s\n", mono_inst_name ((ins->opcode))); \
type_from_op (ins, sp [0], sp [1]); \
+ printf ("D: %s\n", mono_inst_name ((ins)->opcode)); \
MONO_ADD_INS (bblock, ins); \
ins->inst_many_bb = mono_mempool_alloc (cfg->mempool,
sizeof(gpointer)*2); \
GET_BBLOCK (cfg, bbhash, tblock, target); \
@@ -1252,7 +1263,7 @@
case OP_ICOMPARE_IMM:
ins->type = bin_comp_table [src1->type] [src1->type] ? STACK_I4
: STACK_INV;
if ((src1->type == STACK_I8) || ((sizeof (gpointer) == 8) &&
((src1->type == STACK_PTR) || (src1->type == STACK_OBJ) || (src1->type ==
STACK_MP))))
- ins->opcode = OP_LCOMPARE;
+ ins->opcode = OP_LCOMPARE_IMM;
return;
case CEE_BEQ:
case CEE_BGE:
@@ -2753,17 +2764,6 @@
return addr;
}
-static MonoJitICallInfo **emul_opcode_map = NULL;
-
-static inline MonoJitICallInfo *
-mono_find_jit_opcode_emulation (int opcode)
-{
- if (emul_opcode_map)
- return emul_opcode_map [opcode];
- else
- return NULL;
-}
-
static MonoException*
mini_loader_error_to_exception (MonoLoaderError *error)
{
@@ -3200,6 +3200,8 @@
static void
decompose_opcode (MonoCompile *cfg, MonoInst *ins)
{
+ /* FIXME: Instead of = NOP, don't emit the original ins at all */
+
switch (ins->opcode) {
case OP_IADD_OVF:
ins->opcode = OP_IADDCC;
@@ -3271,11 +3273,154 @@
MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
ins->opcode = CEE_NOP;
break;
- case OP_IMUL_OVF:
- case OP_IMUL_OVF_UN:
+ case OP_ICONV_TO_I4:
+ ins->opcode = OP_MOVE;
break;
+
+ /* Long opcodes on 64 bit machines */
+#if SIZEOF_VOID_P == 8
+ case OP_LCONV_TO_I4:
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_LSHR_IMM, ins->dreg,
ins->sreg1, 0);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_I8:
+ case OP_ICONV_TO_U8:
+ ins->opcode = OP_MOVE;
+ break;
+ case OP_ICONV_TO_I8:
+ /* FIXME: Widen ? */
+ ins->opcode = OP_MOVE;
+ break;
+ case OP_LCONV_TO_U4:
+ /* Clean out the upper word */
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, ins->dreg,
ins->sreg1, 0);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LADD_OVF:
+ MONO_EMIT_NEW_BIALU (cfg, OP_ADDCC, ins->dreg, ins->sreg1,
ins->sreg2);
+ MONO_EMIT_NEW_COND_EXC (cfg, OV, "OverflowException");
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LADD_OVF_UN:
+ MONO_EMIT_NEW_BIALU (cfg, OP_ADDCC, ins->dreg, ins->sreg1,
ins->sreg2);
+ MONO_EMIT_NEW_COND_EXC (cfg, C, "OverflowException");
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LSUB_OVF:
+ MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg, ins->sreg1,
ins->sreg2);
+ MONO_EMIT_NEW_COND_EXC (cfg, OV, "OverflowException");
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LSUB_OVF_UN:
+ MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg, ins->sreg1,
ins->sreg2);
+ MONO_EMIT_NEW_COND_EXC (cfg, C, "OverflowException");
+ ins->opcode = CEE_NOP;
+ break;
+
+ case OP_LCONV_TO_OVF_I1:
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 127);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT, "OverflowException");
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, -128);
+ MONO_EMIT_NEW_COND_EXC (cfg, LT, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_LCONV_TO_I1, ins->dreg,
ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_I1_UN:
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 127);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_LCONV_TO_I1, ins->dreg,
ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U1:
+ /* probe value to be within 0 to 255 */
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 255);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_AND_IMM, ins->dreg,
ins->sreg1, 0xff);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U1_UN:
+ /* probe value to be within 0 to 255 */
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 255);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_AND_IMM, ins->dreg,
ins->sreg1, 0xff);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_I2:
+ /* Probe value to be within -32768 and 32767 */
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 32767);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT, "OverflowException");
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, -32768);
+ MONO_EMIT_NEW_COND_EXC (cfg, LT, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_LCONV_TO_I2, ins->dreg,
ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_I2_UN:
+ /* Probe value to be within 0 and 32767 */
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 32767);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_LCONV_TO_I2, ins->dreg,
ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U2:
+ /* Probe value to be within 0 and 65535 */
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 0xffff);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_AND_IMM, ins->dreg,
ins->sreg1, 0xffff);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U2_UN:
+ /* Probe value to be within 0 and 65535 */
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 0xffff);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_AND_IMM, ins->dreg,
ins->sreg1, 0xffff);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_I4:
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 0x7fffffff);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT, "OverflowException");
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, -2147483648);
+ MONO_EMIT_NEW_COND_EXC (cfg, LT, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_I4_UN:
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 0x7fffffff);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U4:
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 0xffffffffUL);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT, "OverflowException");
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_COMPARE_IMM, -1, ins->sreg1,
0);
+ MONO_EMIT_NEW_COND_EXC (cfg, LT, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U4_UN:
+ MONO_EMIT_NEW_COMPARE_IMM (cfg, ins->sreg1, 0xffffffff);
+ MONO_EMIT_NEW_COND_EXC (cfg, GT_UN, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_I_UN:
+ case OP_LCONV_TO_OVF_I8_UN:
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_COMPARE_IMM, -1, ins->sreg1,
0);
+ MONO_EMIT_NEW_COND_EXC (cfg, LT, "OverflowException");
+ MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+ case OP_LCONV_TO_OVF_U8:
+ MONO_EMIT_NEW_BIALU_IMM (cfg, OP_COMPARE_IMM, -1, ins->sreg1,
0);
+ MONO_EMIT_NEW_COND_EXC (cfg, LT, "OverflowException");
+
+ MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ins->dreg, ins->sreg1);
+ ins->opcode = CEE_NOP;
+ break;
+#endif
+
default:
- g_assert_not_reached ();
+ break;
}
}
@@ -3830,19 +3975,19 @@
ip += 5;
*sp++ = ins;
break;
-#if 0
case CEE_LDC_I8:
CHECK_OPSIZE (9);
CHECK_STACK_OVF (1);
MONO_INST_NEW (cfg, ins, OP_I8CONST);
ins->cil_code = ip;
ins->type = STACK_I8;
+ ins->dreg = alloc_dreg (cfg, STACK_I8);
++ip;
ins->inst_l = (gint64)read64 (ip);
+ MONO_ADD_INS (bblock, ins);
ip += 8;
*sp++ = ins;
break;
-#endif
case CEE_LDC_R4: {
float *f;
/* FIXME: we should really allocate this only late in
the compilation process */
@@ -4688,6 +4833,8 @@
*sp++ = emit_tree (cfg, bblock, ins, ip + 1);
mono_get_got_var (cfg);
}
+ else
+ decompose_opcode (cfg, ins);
ip++;
break;
case CEE_CONV_OVF_I4:
@@ -6791,6 +6938,7 @@
MONO_INST_NEW (cfg, ins, OP_I8CONST);
ins->type = STACK_I8;
ins->inst_l = 0;
+ ins->dreg = alloc_dreg (cfg, STACK_I8);
MONO_ADD_INS (init_localsbb, ins);
NEW_LOCSTORE (cfg, store, i, ins);
MONO_ADD_INS (init_localsbb, store);
@@ -6880,6 +7028,11 @@
#define NONE " "
#define IREG "i"
#define FREG "f"
+#if SIZEOF_VOID_P == 8
+#define LREG IREG
+#else
+#error Not implemented
+#endif
/* keep in sync with the enum in mini.h */
static const char* const
opcode_info[] = {
@@ -6924,7 +7077,6 @@
switch (ins->type) {
case STACK_I4:
- case STACK_I8:
case STACK_PTR:
case STACK_MP:
case STACK_OBJ:
@@ -6933,6 +7085,13 @@
case STACK_R8:
vreg_to_inst ['f'][ins->dreg] = ins;
break;
+ case STACK_I8:
+#if SIZEOF_VOID_P == 8
+ vreg_to_inst ['i'][ins->dreg] = ins;
+#else
+ NOT_IMPLEMENTED;
+#endif
+ break;
default:
NOT_IMPLEMENTED;
}
@@ -7045,4 +7204,5 @@
* - handling ovf opcodes: decompose in method_to_ir.
* - unify to_regstore/to_regload as to_regmove
* - unify iregs/fregs
+ * - use sext/zext opcodes instead of shifts
*/
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/mini-amd64.c
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/mini-amd64.c 2005-11-27
21:30:40 UTC (rev 53530)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/mini-amd64.c 2005-11-27
21:59:45 UTC (rev 53531)
@@ -1513,6 +1513,7 @@
}
break;
case OP_COMPARE_IMM:
+ case OP_LCOMPARE_IMM:
/* OP_COMPARE_IMM (reg, 0)
* -->
* OP_AMD64_TEST_NULL (reg)
@@ -1770,6 +1771,7 @@
ins->sreg2 = temp->dreg;
break;
case OP_COMPARE_IMM:
+ case OP_LCOMPARE_IMM:
if (!amd64_is_imm32 (ins->inst_imm)) {
NEW_INS (cfg, temp, OP_I8CONST);
temp->inst_c0 = ins->inst_imm;
@@ -1822,24 +1824,34 @@
{
switch (opcode) {
case OP_IBEQ:
+ case OP_LBEQ:
return X86_CC_EQ;
case OP_IBNE_UN:
+ case OP_LBNE_UN:
return X86_CC_NE;
case OP_IBLT:
+ case OP_LBLT:
return X86_CC_LT;
case OP_IBLT_UN:
+ case OP_LBLT_UN:
return X86_CC_LT;
case OP_IBGT:
+ case OP_LBGT:
return X86_CC_GT;
case OP_IBGT_UN:
+ case OP_LBGT_UN:
return X86_CC_GT;
case OP_IBGE:
+ case OP_LBGE:
return X86_CC_GE;
case OP_IBGE_UN:
+ case OP_LBGE_UN:
return X86_CC_GE;
case OP_IBLE:
+ case OP_LBLE:
return X86_CC_LE;
case OP_IBLE_UN:
+ case OP_LBLE_UN:
return X86_CC_LE;
default:
g_assert_not_reached ();
@@ -2270,18 +2282,22 @@
amd64_mov_reg_memindex_size (code, ins->dreg,
ins->inst_basereg, 0, ins->inst_indexreg, 0, 8);
break;
case CEE_CONV_I1:
+ case OP_LCONV_TO_I1:
case OP_ICONV_TO_I1:
amd64_widen_reg (code, ins->dreg, ins->sreg1, TRUE,
FALSE);
break;
case CEE_CONV_I2:
+ case OP_LCONV_TO_I2:
case OP_ICONV_TO_I2:
amd64_widen_reg (code, ins->dreg, ins->sreg1, TRUE,
TRUE);
break;
case CEE_CONV_U1:
+ case OP_LCONV_TO_U1:
case OP_ICONV_TO_U1:
amd64_widen_reg (code, ins->dreg, ins->sreg1, FALSE,
FALSE);
break;
case CEE_CONV_U2:
+ case OP_LCONV_TO_U2:
case OP_ICONV_TO_U2:
amd64_widen_reg (code, ins->dreg, ins->sreg1, FALSE,
TRUE);
break;
@@ -2299,6 +2315,7 @@
amd64_alu_reg_reg (code, X86_CMP, ins->sreg1,
ins->sreg2);
break;
case OP_COMPARE_IMM:
+ case OP_LCOMPARE_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_CMP, ins->sreg1,
ins->inst_imm);
break;
@@ -2356,6 +2373,7 @@
break;
case OP_ADDCC:
case CEE_ADD:
+ case OP_LADD:
amd64_alu_reg_reg (code, X86_ADD, ins->sreg1,
ins->sreg2);
break;
case OP_ADC:
@@ -2371,6 +2389,7 @@
break;
case OP_SUBCC:
case CEE_SUB:
+ case OP_LSUB:
amd64_alu_reg_reg (code, X86_SUB, ins->sreg1,
ins->sreg2);
break;
case OP_SBB:
@@ -2384,13 +2403,7 @@
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_SBB, ins->dreg,
ins->inst_imm);
break;
- case CEE_AND:
- amd64_alu_reg_reg (code, X86_AND, ins->sreg1,
ins->sreg2);
- break;
- case OP_AND_IMM:
- g_assert (amd64_is_imm32 (ins->inst_imm));
- amd64_alu_reg_imm (code, X86_AND, ins->sreg1,
ins->inst_imm);
- break;
+
case CEE_MUL:
case OP_LMUL:
amd64_imul_reg_reg (code, ins->sreg1, ins->sreg2);
@@ -2482,7 +2495,17 @@
amd64_imul_reg_reg (code, ins->sreg1, ins->sreg2);
EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE,
"OverflowException");
break;
+
+ case CEE_AND:
+ case OP_LAND:
+ amd64_alu_reg_reg (code, X86_AND, ins->sreg1,
ins->sreg2);
+ break;
+ case OP_AND_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_reg_imm (code, X86_AND, ins->sreg1,
ins->inst_imm);
+ break;
case CEE_OR:
+ case OP_LOR:
amd64_alu_reg_reg (code, X86_OR, ins->sreg1,
ins->sreg2);
break;
case OP_OR_IMM
@@ -2490,12 +2513,14 @@
amd64_alu_reg_imm (code, X86_OR, ins->sreg1,
ins->inst_imm);
break;
case CEE_XOR:
+ case OP_LXOR:
amd64_alu_reg_reg (code, X86_XOR, ins->sreg1,
ins->sreg2);
break;
case OP_XOR_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_XOR, ins->sreg1,
ins->inst_imm);
break;
+
case CEE_SHL:
case OP_LSHL:
g_assert (ins->sreg2 == AMD64_RCX);
@@ -2684,6 +2709,11 @@
case OP_IBGT:
case OP_IBGE:
case OP_IBLE:
+ case OP_LBEQ:
+ case OP_LBLT:
+ case OP_LBGT:
+ case OP_LBGE:
+ case OP_LBLE:
EMIT_COND_BRANCH (ins, opcode_to_x86_cond
(ins->opcode), TRUE);
break;
case OP_IBNE_UN:
@@ -2691,12 +2721,19 @@
case OP_IBGT_UN:
case OP_IBGE_UN:
case OP_IBLE_UN:
+ case OP_LBNE_UN:
+ case OP_LBLT_UN:
+ case OP_LBGT_UN:
+ case OP_LBGE_UN:
+ case OP_LBLE_UN:
EMIT_COND_BRANCH (ins, opcode_to_x86_cond
(ins->opcode), FALSE);
break;
case CEE_NOT:
+ case OP_LNOT:
amd64_not_reg (code, ins->sreg1);
break;
case CEE_NEG:
+ case OP_LNEG:
amd64_neg_reg (code, ins->sreg1);
break;
case OP_SEXT_I1:
@@ -2995,26 +3032,31 @@
amd64_jump_reg (code, ins->sreg1);
break;
case OP_CEQ:
+ case OP_LCEQ:
case OP_ICEQ:
amd64_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE,
FALSE);
break;
case OP_CLT:
+ case OP_LCLT:
case OP_ICLT:
amd64_set_reg (code, X86_CC_LT, ins->dreg, TRUE);
amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE,
FALSE);
break;
case OP_CLT_UN:
+ case OP_LCLT_UN:
case OP_ICLT_UN:
amd64_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE,
FALSE);
break;
case OP_CGT:
+ case OP_LCGT:
case OP_ICGT:
amd64_set_reg (code, X86_CC_GT, ins->dreg, TRUE);
amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE,
FALSE);
break;
case OP_CGT_UN:
+ case OP_LCGT_UN:
case OP_ICGT_UN:
amd64_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE,
FALSE);
@@ -3149,6 +3191,8 @@
amd64_fld_membase (code, ins->inst_basereg,
ins->inst_offset, FALSE);
break;
case CEE_CONV_R4: /* FIXME: change precision */
+ case OP_ICONV_TO_R4:
+ case OP_ICONV_TO_R8:
case CEE_CONV_R8:
if (use_sse2)
amd64_sse_cvtsi2sd_reg_reg_size (code,
ins->dreg, ins->sreg1, 4);
@@ -3182,6 +3226,12 @@
g_assert_not_reached ();
amd64_fild_membase (code, ins->inst_basereg,
ins->inst_offset, FALSE);
break;
+ case OP_FCONV_TO_R8:
+ /* Nothing to do */
+ break;
+ case OP_FCONV_TO_R4:
+ /* FIXME: nothing to do ?? */
+ break;
case OP_FCONV_TO_I1:
code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 1, TRUE);
break;
@@ -3194,6 +3244,9 @@
case OP_FCONV_TO_U2:
code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 2, FALSE);
break;
+ case OP_FCONV_TO_U4:
+ code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 4, FALSE);
+ break;
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 4, TRUE);
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/mini-ops.h
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/mini-ops.h 2005-11-27
21:30:40 UTC (rev 53530)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/mini-ops.h 2005-11-27
21:59:45 UTC (rev 53531)
@@ -9,10 +9,10 @@
MINI_OP(OP_COMPARE, "compare", NONE, IREG, IREG)
MINI_OP(OP_COMPARE_IMM, "compare_imm", NONE, IREG, NONE)
MINI_OP(OP_FCOMPARE, "fcompare", NONE, FREG, FREG)
-MINI_OP(OP_LCOMPARE, "lcompare", NONE, NONE, NONE)
+MINI_OP(OP_LCOMPARE, "lcompare", NONE, LREG, LREG)
MINI_OP(OP_ICOMPARE, "icompare", NONE, IREG, IREG)
MINI_OP(OP_ICOMPARE_IMM, "icompare_imm", NONE, IREG, NONE)
-MINI_OP(OP_LCOMPARE_IMM, "lcompare_imm", NONE, NONE, NONE)
+MINI_OP(OP_LCOMPARE_IMM, "lcompare_imm", NONE, LREG, NONE)
MINI_OP(OP_LOCAL, "local", NONE, NONE, NONE)
MINI_OP(OP_ARG, "arg", NONE, NONE, NONE)
MINI_OP(OP_ARGLIST, "oparglist", NONE, NONE, NONE)
@@ -53,7 +53,7 @@
MINI_OP(OP_CALL_MEMBASE, "call_membase", NONE, NONE, NONE)
MINI_OP(OP_TRAP, "trap", NONE, NONE, NONE)
MINI_OP(OP_ICONST, "iconst", IREG, NONE, NONE)
-MINI_OP(OP_I8CONST, "i8const", NONE, NONE, NONE)
+MINI_OP(OP_I8CONST, "i8const", LREG, NONE, NONE)
MINI_OP(OP_R4CONST, "r4const", FREG, NONE, NONE)
MINI_OP(OP_R8CONST, "r8const", FREG, NONE, NONE)
MINI_OP(OP_REGVAR, "regvar", NONE, NONE, NONE)
@@ -163,89 +163,90 @@
MINI_OP(OP_COND_EXC_INC, "cond_exc_inc", NONE, NONE, NONE)
/* 64 bit opcodes: must be in the same order as the matching CEE_ opcodes:
binops_op_map */
-MINI_OP(OP_LADD, "long_add", NONE, NONE, NONE)
-MINI_OP(OP_LSUB, "long_sub", NONE, NONE, NONE)
-MINI_OP(OP_LMUL, "long_mul", NONE, NONE, NONE)
-MINI_OP(OP_LDIV, "long_div", NONE, NONE, NONE)
-MINI_OP(OP_LDIV_UN, "long_div_un", NONE, NONE, NONE)
-MINI_OP(OP_LREM, "long_rem", NONE, NONE, NONE)
-MINI_OP(OP_LREM_UN, "long_rem_un", NONE, NONE, NONE)
-MINI_OP(OP_LAND, "long_and", NONE, NONE, NONE)
-MINI_OP(OP_LOR, "long_or", NONE, NONE, NONE)
-MINI_OP(OP_LXOR, "long_xor", NONE, NONE, NONE)
-MINI_OP(OP_LSHL, "long_shl", NONE, NONE, NONE)
-MINI_OP(OP_LSHR, "long_shr", NONE, NONE, NONE)
-MINI_OP(OP_LSHR_UN, "long_shr_un", NONE, NONE, NONE)
+MINI_OP(OP_LADD, "long_add", LREG, LREG, LREG)
+MINI_OP(OP_LSUB, "long_sub", LREG, LREG, LREG)
+MINI_OP(OP_LMUL, "long_mul", LREG, LREG, LREG)
+MINI_OP(OP_LDIV, "long_div", LREG, LREG, LREG)
+MINI_OP(OP_LDIV_UN, "long_div_un", LREG, LREG, LREG)
+MINI_OP(OP_LREM, "long_rem", LREG, LREG, LREG)
+MINI_OP(OP_LREM_UN, "long_rem_un", LREG, LREG, LREG)
+MINI_OP(OP_LAND, "long_and", LREG, LREG, LREG)
+MINI_OP(OP_LOR, "long_or", LREG, LREG, LREG)
+MINI_OP(OP_LXOR, "long_xor", LREG, LREG, LREG)
+MINI_OP(OP_LSHL, "long_shl", LREG, LREG, LREG)
+MINI_OP(OP_LSHR, "long_shr", LREG, LREG, LREG)
+MINI_OP(OP_LSHR_UN, "long_shr_un", LREG, LREG, LREG)
/* 64 bit opcodes: must be in the same order as the matching CEE_ opcodes:
unops_op_map */
-MINI_OP(OP_LNEG, "long_neg", NONE, NONE, NONE)
-MINI_OP(OP_LNOT, "long_not", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_I1,"long_conv_to_i1", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_I2,"long_conv_to_i2", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_I4,"long_conv_to_i4", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_I8,"long_conv_to_i8", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_R4,"long_conv_to_r4", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_R8,"long_conv_to_r8", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_U4,"long_conv_to_u4", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_U8,"long_conv_to_u8", NONE, NONE, NONE)
+MINI_OP(OP_LNEG, "long_neg", LREG, LREG, NONE)
+MINI_OP(OP_LNOT, "long_not", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I1,"long_conv_to_i1", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I2,"long_conv_to_i2", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I4,"long_conv_to_i4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I8,"long_conv_to_i8", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_R4,"long_conv_to_r4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_R8,"long_conv_to_r8", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_U4,"long_conv_to_u4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_U8,"long_conv_to_u8", LREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_U2, "long_conv_to_u2", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_U1, "long_conv_to_u1", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_I, "long_conv_to_i", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I,"long_conv_to_ovf_i", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U,"long_conv_to_ovf_u", NONE, NONE, NONE)
-MINI_OP(OP_LADD_OVF, "long_add_ovf", NONE, NONE, NONE)
-MINI_OP(OP_LADD_OVF_UN, "long_add_ovf_un", NONE, NONE, NONE)
-MINI_OP(OP_LMUL_OVF, "long_mul_ovf", NONE, NONE, NONE)
-MINI_OP(OP_LMUL_OVF_UN, "long_mul_ovf_un", NONE, NONE, NONE)
-MINI_OP(OP_LSUB_OVF, "long_sub_ovf", NONE, NONE, NONE)
-MINI_OP(OP_LSUB_OVF_UN, "long_sub_ovf_un", NONE, NONE, NONE)
+MINI_OP(OP_LCONV_TO_U2, "long_conv_to_u2", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_U1, "long_conv_to_u1", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I, "long_conv_to_i", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I,"long_conv_to_ovf_i", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U,"long_conv_to_ovf_u", LREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I1_UN,"long_conv_to_ovf_i1_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I2_UN,"long_conv_to_ovf_i2_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I4_UN,"long_conv_to_ovf_i4_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I8_UN,"long_conv_to_ovf_i8_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U1_UN,"long_conv_to_ovf_u1_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U2_UN,"long_conv_to_ovf_u2_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U4_UN,"long_conv_to_ovf_u4_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U8_UN,"long_conv_to_ovf_u8_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I_UN, "long_conv_to_ovf_i_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U_UN, "long_conv_to_ovf_u_un", NONE, NONE, NONE)
+MINI_OP(OP_LADD_OVF, "long_add_ovf", LREG, LREG, LREG)
+MINI_OP(OP_LADD_OVF_UN, "long_add_ovf_un", LREG, LREG, LREG)
+MINI_OP(OP_LMUL_OVF, "long_mul_ovf", LREG, LREG, LREG)
+MINI_OP(OP_LMUL_OVF_UN, "long_mul_ovf_un", LREG, LREG, LREG)
+MINI_OP(OP_LSUB_OVF, "long_sub_ovf", LREG, LREG, LREG)
+MINI_OP(OP_LSUB_OVF_UN, "long_sub_ovf_un", LREG, LREG, LREG)
-MINI_OP(OP_LCONV_TO_OVF_I1,"long_conv_to_ovf_i1", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U1,"long_conv_to_ovf_u1", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I2,"long_conv_to_ovf_i2", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U2,"long_conv_to_ovf_u2", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I4,"long_conv_to_ovf_i4", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U4,"long_conv_to_ovf_u4", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_I8,"long_conv_to_ovf_i8", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_OVF_U8,"long_conv_to_ovf_u8", NONE, NONE, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I1_UN,"long_conv_to_ovf_i1_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I2_UN,"long_conv_to_ovf_i2_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I4_UN,"long_conv_to_ovf_i4_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I8_UN,"long_conv_to_ovf_i8_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U1_UN,"long_conv_to_ovf_u1_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U2_UN,"long_conv_to_ovf_u2_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U4_UN,"long_conv_to_ovf_u4_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U8_UN,"long_conv_to_ovf_u8_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I_UN, "long_conv_to_ovf_i_un", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U_UN, "long_conv_to_ovf_u_un", LREG, LREG, NONE)
-MINI_OP(OP_LCEQ, "long_ceq", NONE, NONE, NONE)
-MINI_OP(OP_LCGT, "long_cgt", NONE, NONE, NONE)
-MINI_OP(OP_LCGT_UN,"long_cgt_un", NONE, NONE, NONE)
-MINI_OP(OP_LCLT, "long_clt", NONE, NONE, NONE)
-MINI_OP(OP_LCLT_UN,"long_clt_un", NONE, NONE, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I1,"long_conv_to_ovf_i1", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U1,"long_conv_to_ovf_u1", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I2,"long_conv_to_ovf_i2", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U2,"long_conv_to_ovf_u2", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I4,"long_conv_to_ovf_i4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U4,"long_conv_to_ovf_u4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_I8,"long_conv_to_ovf_i8", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_OVF_U8,"long_conv_to_ovf_u8", LREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_R_UN,"long_conv_to_r_un", NONE, NONE, NONE)
-MINI_OP(OP_LCONV_TO_U, "long_conv_to_u", NONE, NONE, NONE)
-MINI_OP(OP_LSHR_IMM, "long_shr_imm", NONE, NONE, NONE)
-MINI_OP(OP_LSHR_UN_IMM, "long_shr_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_LSHL_IMM, "long_shl_imm", NONE, NONE, NONE)
-MINI_OP(OP_LADD_IMM, "long_add_imm", NONE, NONE, NONE)
-MINI_OP(OP_LSUB_IMM, "long_sub_imm", NONE, NONE, NONE)
-MINI_OP(OP_LMUL_IMM, "long_mul_imm", NONE, NONE, NONE)
+MINI_OP(OP_LCEQ, "long_ceq", LREG, NONE, NONE)
+MINI_OP(OP_LCGT, "long_cgt", LREG, NONE, NONE)
+MINI_OP(OP_LCGT_UN,"long_cgt_un", LREG, NONE, NONE)
+MINI_OP(OP_LCLT, "long_clt", LREG, NONE, NONE)
+MINI_OP(OP_LCLT_UN,"long_clt_un", LREG, NONE, NONE)
+MINI_OP(OP_LCONV_TO_R_UN,"long_conv_to_r_un", FREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_U, "long_conv_to_u", IREG, LREG, NONE)
+MINI_OP(OP_LSHR_IMM, "long_shr_imm", LREG, LREG, NONE)
+MINI_OP(OP_LSHR_UN_IMM, "long_shr_un_imm", LREG, LREG, NONE)
+MINI_OP(OP_LSHL_IMM, "long_shl_imm", LREG, LREG, NONE)
+MINI_OP(OP_LADD_IMM, "long_add_imm", LREG, LREG, NONE)
+MINI_OP(OP_LSUB_IMM, "long_sub_imm", LREG, LREG, NONE)
+MINI_OP(OP_LMUL_IMM, "long_mul_imm", LREG, LREG, NONE)
+
MINI_OP(OP_LBEQ, "long_beq", NONE, NONE, NONE)
+MINI_OP(OP_LBGE, "long_bge", NONE, NONE, NONE)
+MINI_OP(OP_LBGT, "long_bgt", NONE, NONE, NONE)
+MINI_OP(OP_LBLE, "long_ble", NONE, NONE, NONE)
+MINI_OP(OP_LBLT, "long_blt", NONE, NONE, NONE)
MINI_OP(OP_LBNE_UN, "long_bne_un", NONE, NONE, NONE)
-MINI_OP(OP_LBLT, "long_blt", NONE, NONE, NONE)
-MINI_OP(OP_LBLT_UN, "long_blt_un", NONE, NONE, NONE)
-MINI_OP(OP_LBGT, "long_bgt", NONE, NONE, NONE)
-MINI_OP(OP_LBGT_UN, "long_btg_un", NONE, NONE, NONE)
-MINI_OP(OP_LBGE, "long_bge", NONE, NONE, NONE)
MINI_OP(OP_LBGE_UN, "long_bge_un", NONE, NONE, NONE)
-MINI_OP(OP_LBLE, "long_ble", NONE, NONE, NONE)
+MINI_OP(OP_LBGT_UN, "long_bgt_un", NONE, NONE, NONE)
MINI_OP(OP_LBLE_UN, "long_ble_un", NONE, NONE, NONE)
+MINI_OP(OP_LBLT_UN, "long_blt_un", NONE, NONE, NONE)
MINI_OP(OP_LONG_SHRUN_32, "long_shr_un_32", NONE, NONE, NONE)
@@ -339,26 +340,26 @@
MINI_OP(OP_ICLT_UN,"int_clt_un", IREG, NONE, NONE)
MINI_OP(OP_IBEQ, "int_beq", NONE, NONE, NONE)
+MINI_OP(OP_IBGE, "int_bge", NONE, NONE, NONE)
+MINI_OP(OP_IBGT, "int_bgt", NONE, NONE, NONE)
+MINI_OP(OP_IBLE, "int_ble", NONE, NONE, NONE)
+MINI_OP(OP_IBLT, "int_blt", NONE, NONE, NONE)
MINI_OP(OP_IBNE_UN, "int_bne_un", NONE, NONE, NONE)
-MINI_OP(OP_IBLT, "int_blt", NONE, NONE, NONE)
-MINI_OP(OP_IBLT_UN, "int_blt_un", NONE, NONE, NONE)
-MINI_OP(OP_IBGT, "int_bgt", NONE, NONE, NONE)
+MINI_OP(OP_IBGE_UN, "int_bge_un", NONE, NONE, NONE)
MINI_OP(OP_IBGT_UN, "int_bgt_un", NONE, NONE, NONE)
-MINI_OP(OP_IBGE, "int_bge", NONE, NONE, NONE)
-MINI_OP(OP_IBGE_UN, "int_bge_un", NONE, NONE, NONE)
-MINI_OP(OP_IBLE, "int_ble", NONE, NONE, NONE)
MINI_OP(OP_IBLE_UN, "int_ble_un", NONE, NONE, NONE)
+MINI_OP(OP_IBLT_UN, "int_blt_un", NONE, NONE, NONE)
-MINI_OP(OP_FBEQ, "float_beq", NONE, NONE, NONE)
-MINI_OP(OP_FBNE_UN,"float_bne_un", NONE, NONE, NONE)
-MINI_OP(OP_FBLT, "float_blt", NONE, NONE, NONE)
-MINI_OP(OP_FBLT_UN,"float_blt_un", NONE, NONE, NONE)
-MINI_OP(OP_FBGT, "float_bgt", NONE, NONE, NONE)
-MINI_OP(OP_FBGT_UN,"float_btg_un", NONE, NONE, NONE)
-MINI_OP(OP_FBGE, "float_bge", NONE, NONE, NONE)
-MINI_OP(OP_FBGE_UN,"float_bge_un", NONE, NONE, NONE)
-MINI_OP(OP_FBLE, "float_ble", NONE, NONE, NONE)
-MINI_OP(OP_FBLE_UN,"float_ble_un", NONE, NONE, NONE)
+MINI_OP(OP_FBEQ, "float_beq", NONE, NONE, NONE)
+MINI_OP(OP_FBGE, "float_bge", NONE, NONE, NONE)
+MINI_OP(OP_FBGT, "float_bgt", NONE, NONE, NONE)
+MINI_OP(OP_FBLE, "float_ble", NONE, NONE, NONE)
+MINI_OP(OP_FBLT, "float_blt", NONE, NONE, NONE)
+MINI_OP(OP_FBNE_UN, "float_bne_un", NONE, NONE, NONE)
+MINI_OP(OP_FBGE_UN, "float_bge_un", NONE, NONE, NONE)
+MINI_OP(OP_FBGT_UN, "float_bgt_un", NONE, NONE, NONE)
+MINI_OP(OP_FBLE_UN, "float_ble_un", NONE, NONE, NONE)
+MINI_OP(OP_FBLT_UN, "float_blt_un", NONE, NONE, NONE)
/* float opcodes: must be in the same order as the matching CEE_ opcodes:
binops_op_map */
MINI_OP(OP_FADD, "float_add", FREG, FREG, FREG)
@@ -448,21 +449,21 @@
MINI_OP(OP_BIGMUL_UN, "op_bigmul_un", NONE, NONE, NONE)
/* opcodes most architecture have */
-MINI_OP(OP_ADC, "adc", NONE, NONE, NONE)
-MINI_OP(OP_ADC_IMM, "adc_imm", NONE, NONE, NONE)
-MINI_OP(OP_SBB, "sbb", NONE, NONE, NONE)
-MINI_OP(OP_SBB_IMM, "sbb_imm", NONE, NONE, NONE)
-MINI_OP(OP_ADDCC, "addcc", NONE, NONE, NONE)
-MINI_OP(OP_ADDCC_IMM, "addcc_imm", NONE, NONE, NONE)
-MINI_OP(OP_SUBCC, "subcc", NONE, NONE, NONE)
-MINI_OP(OP_SUBCC_IMM, "subcc_imm", NONE, NONE, NONE)
+MINI_OP(OP_ADC, "adc", IREG, IREG, IREG)
+MINI_OP(OP_ADC_IMM, "adc_imm", IREG, IREG, NONE)
+MINI_OP(OP_SBB, "sbb", IREG, IREG, IREG)
+MINI_OP(OP_SBB_IMM, "sbb_imm", IREG, IREG, NONE)
+MINI_OP(OP_ADDCC, "addcc", IREG, IREG, IREG)
+MINI_OP(OP_ADDCC_IMM, "addcc_imm", IREG, IREG, NONE)
+MINI_OP(OP_SUBCC, "subcc", IREG, IREG, IREG)
+MINI_OP(OP_SUBCC_IMM, "subcc_imm", IREG, IREG, NONE)
MINI_OP(OP_BR_REG, "br_reg", NONE, IREG, NONE)
-MINI_OP(OP_SEXT_I1, "sext_i1", NONE, NONE, NONE)
-MINI_OP(OP_SEXT_I2, "sext_i2", NONE, NONE, NONE)
-MINI_OP(OP_SEXT_I4, "sext_i4", NONE, NONE, NONE)
-MINI_OP(OP_ZEXT_I1, "zext_i1", NONE, NONE, NONE)
-MINI_OP(OP_ZEXT_I2, "zext_i2", NONE, NONE, NONE)
-MINI_OP(OP_ZEXT_I4, "zext_i4", NONE, NONE, NONE)
+MINI_OP(OP_SEXT_I1, "sext_i1", IREG, IREG, NONE)
+MINI_OP(OP_SEXT_I2, "sext_i2", IREG, IREG, NONE)
+MINI_OP(OP_SEXT_I4, "sext_i4", IREG, IREG, NONE)
+MINI_OP(OP_ZEXT_I1, "zext_i1", IREG, IREG, NONE)
+MINI_OP(OP_ZEXT_I2, "zext_i2", IREG, IREG, NONE)
+MINI_OP(OP_ZEXT_I4, "zext_i4", IREG, IREG, NONE)
MINI_OP(OP_CNE, "cne", NONE, NONE, NONE)
/* to implement the upper half of long32 add and sub */
MINI_OP(OP_ADD_OVF_CARRY, "add_ovf_carry", NONE, NONE, NONE)
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/mini.c
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/mini.c 2005-11-27
21:30:40 UTC (rev 53530)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/mini.c 2005-11-27
21:59:45 UTC (rev 53531)
@@ -2980,7 +2980,7 @@
static MonoJitICallInfo **emul_opcode_map = NULL;
-static inline MonoJitICallInfo *
+MonoJitICallInfo *
mono_find_jit_opcode_emulation (int opcode)
{
if (emul_opcode_map)
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/mini.h
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/mini.h 2005-11-27
21:30:40 UTC (rev 53530)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/mini.h 2005-11-27
21:59:45 UTC (rev 53531)
@@ -840,7 +840,7 @@
gboolean mono_method_blittable (MonoMethod *method);
gboolean mono_method_same_domain (MonoJitInfo *caller, MonoJitInfo
*callee);
-
+MonoJitICallInfo *mono_find_jit_opcode_emulation (int opcode);
void mono_register_opcode_emulation (int opcode, const char* name,
const char *sigstr, gpointer func, gboolean no_throw);
void mono_draw_graph (MonoCompile *cfg,
MonoGraphOptions draw_options);
void mono_add_varcopy_to_end (MonoCompile *cfg, MonoBasicBlock
*bb, int src, int dest);
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