ECSI Workshop > TLM Standards > December 4, 2006 - Grenoble, France

Mon, 13 Nov 2006 00:40:44 -0800

Title: ECSI Workshop on TLM Users Experience

ECSI Institute Workshop on

TLM Standards

December 4, 2006 - 9:30-18:30

Grenoble, France

Related events: 

·        December 5, 2007: Open Session on December 5th, 2006 - 14:00-16:00:

IP-XACT Technical Awareness Session by The SPIRIT Consortium

www.us.design-reuse.com/ipsoc2006/around/spirit/ 

 ·        December 6-7, 2007:

IP-Based SoC Design Conference & Exhibition

www.us.design-reuse.com/ipsoc2006/

Outline

The TLM Standards workshop organised by ECSI in conjunction with the IP-SOC 2006 Conference will provide the audience with an update on international Transaction Level Modelling related standards. This is workshop coincides with the public review period of the new OSCI TLM 2.0 standard making this a very timely forum for presentation and discussion. Many EDA and IP companies are intending to support this OSCI standard by providing API interfaces defined on top of TLM 2.0, enabling compatible libraries and models as well as enhanced modelling support services. This is an important technical development for both EDA companies and users. Unified adoption of these standards is critical to ensure the increased industry adoption of efficient ESL design and modelling.

This dynamic evolution of ESL gives the design community significant reasons to meet and to discuss different points of view. There are some very important issues arising: will the TLM 2.0-compliant models be truly interoperable? How can this interoperability be proven in the multi-source and multi-tool environment?  How should IP companies actively start delivering or generating models to these APIs?

This event is intended to give a complete overview of the TLM standards today, the existing and emerging tool support, interfaces, libraries and design environment.  It presents an opportunity to reflect on what we still need to do to truly make ESL the fundamental front-end to the system-on-chip design and development process.  We hope that you can join us for this excellent set of presentations and open discussions.

 

Preliminary Programme

 

 Session 1:  SystemC TLM 2.0 Overview  

 

·       General OSCI update (progress, events, new WGs)

Presenter: Mike Meredith, OSCI President / Stuart Swan, Cadence (TBC)

·       SystemC TLM 2.0 Standard Proposal

o     initial requirements and problems addressed

o     concepts covered

o     solutions agreed

o     open issues to be solved

o     evolution comparing to the version 1.0

o     roadmap and next steps

o     community input expected

Presenter: Alain Clouard, ST & OSCI Chairman (TBC)

 Session 2:  Panel: Q&A Session: discussion with the audience on SystemC TLM 2.0

Panelists: OSCI TLM WG members:
Alain Clouard (ST) (TBC), Nizar Romdhane (ARM),
Stuart Swan (Cadence), Adam Rose (Mentor Graphics)

 Session 3:  Users Requirements Session

Presentation from system and SoC companies on expectations, current practices.

Presenters:

·         Andrea Battistella (ST business division) (TBC)

·         James Aldis (Texas Instruments)

·         Metrics Analysis for TLM Models: First Experiments in the ICODES Project - Francesca Tonetta (Siemens)

·         Josef Eckmüller (Infineon)

·         Ric Howard, Tensilica

 Session 4:  TLM Standard Support Session

The session presents the solutions at the TLM:

·       TLM Modeling Libraries & Protocol and IP Models:

o   RealView ESL API Interface - Nizar Romdhane, ARM

o   OCP Protocol at TLM  M. Burton / J. Aldis, OCP-IP

o   Stuart Swan (Cadence)

o   TLM and Verification - Adam Rose (Mentor Graphics)

o   Markus Wloka (Synopsys)

·       TLM Tool Support and Services:

o   CoFluent

o   GreenSocs

o   SpiraTech MultiLevel Transaction Interfaces  K. Hashmi, SpiraTech

o   VaST Systems

 Session 5:  Panel: OSCI TLM 2.0 have we truly achieved TLM interoperability?  

                       How can the industry prove the interoperability of multi-source TLM models?

                       What else is needed to support complex multi-vendor ESL design-flow integration?

Participation of ARM, ST, Infineon, Synopsys, Tensilica, TI, VaST Systems 

  Session 6:  Parallel Demo and Networking Session 

·         Nizar Romdhane (ARM)

·         Stuart Swan (Cadence)

·         Mike Meredith (Forte Design)

·         Adam Rose (Mentor Graphics)

·         Vincent Perrier (CoFluent Design)

·         Kamal Hashmi (SpiraTech)

·         Markus Wloka, (Synopsys)

·         Jean-Marc Talbot, (VaST Systems)

·         CoWare / Silicomp (TBC)

 

 

Workshop Information & Registration

Workshop description:          http://www.ecsi-association.org/ecsi/events/tlmstd/TLMSTD_Description.pdf

Registration form:                  http://www.ecsi-association.org/ecsi/events/tlmstd/TLMSTD_Registration.pdf

 

The workshop is free for ECSI Industrial & Associate Members (see conditions on the registration form)!

 

Please fill-in the form found on the web page and fax it back to ECSI to +33 4 76 42 87 87

Registration deadline: November 27, 2006

 

More information
         For any additional inquiries, please contact:
                ECSI Office
                Parc Equation   -   2, Avenue de Vignate   -   38610 GIERES, France
                Ph: +33 476 63 49 34   -   Fax: +33 476 42 87 87   -   Email: [EMAIL PROTECTED]    -   http://www.ecsi.org

 

Proceedings
        All workshop   participants will obtain the electronic version (PDF files)  of all presentations after the workshop is finished.
        The presentations will be downloadable from the ECSI web page. 

 

Note
        We respect your privacy. 
        If you would like to be removed from the e-mail list, please send a message to [EMAIL PROTECTED] with the subject "REMOVE".

 

Questionnaire: If you are interested and cannot come, please give us a hint:

  • the date is not convenient:    yes/no
  • the place is not convenient:  yes/no

      What other subjects in system design would you be interested in: ___________

      Thank you!

 

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