Title: ECSI Workshop on TLM Users Experience

Conference on Design and Architectures
for Signal and Image Processing

DASIP 2008

 

Paper submission extended deadline: May 30, 2008
Special session paper submission deadline:  June 16, 2008

 

http://www.ecsi.org/dasip

                                                                          

Université Libre de Bruxelles, Belgium
November 24-26, 2008
       


DASIP Conference is sponsored by ECSI, EURASIP and Universite Libre de Bruxelles
and 
technically co-sponsored by IEEE Benelux Section and IEEE France Section
Call for Papers                  

The development of complex applications involving signal, image and control processing, is classically divided into three consecutive steps: a theoretical study of the algorithms, a study of the target architecture, and finally the implementation. Such a linear design flow is reaching its limits due to the intense pressure on design cycle and strict performance constraints. The approach, called Algorithm-Architecture-Matching, aims to leverage the design flow by a simultaneous study of both algorithmic and architectural issues, taking into account multiple design constraints, as well as algorithm and architecture optimizations.

Introducing new design methodologies is necessary when facing the new emerging applications as for example advanced mobile communication systems or smart sensors based systems. This forms a driving force for the future evolutions of embedded system designs methodologies.

The research community in Europe addressing these issues is very active both in academy and industry. The goals of this Conference are to present the latest results in the domain of design and architecture for signal and image processing and to initiate a regular meeting of European researchers addressing this topic.

The DASIP Conference will give the opportunity for researchers to exchange the ideas and to build the collaboration on emerging topics and technologies. It also aims to strength the links between the European Information Society Technologies (IST) priorities and the researchers in the domain of design and architecture for signal and image processing.

The DASIP Conference results from the success for more than ten years of the French workshop on Algorithm-Architecture-Matching. The first edition called "Workshop on Algorithm Architecture Adequation" was held in Lannion in 1992 (AAA 1992). During eight years a two-year event was organized, AAA 1994 in Grenoble, AAA 1996 in Toulouse, AAA 1998 in Saclay and AAA 2000 in Rocquencourt. In 2002 thanks to its widespread success the workshop was extended to all francophone countries, JFAAA 2002 was held in Monastir and JFAAA 2005 in Dijon. In 2007 the workshop was extended to the Europe in order to reach a wider community. Each edition was a great success gathering more than one hundred of researchers from industry, academia and government organizations. DASIP 2008 will aim to promote and strengthen the links between European researchers further.

In the context of the architectures and tools for signal and image processing DASIP 2008 topics include but are not limited to:

Methods and tools for Algorithm-Architecture-Matching

 System level design and hardware/software codesign
 RTOS for embedded systems
 Formal models and transformations
 Algorithm transformations and metrics
 Communication synthesis
 Architectural and logic synthesis
 Design verification, fault tolerance
 Performance analysis and estimations
 Rapid system prototyping, embedded software
 Embedded system security

New and emerging architectures and technologies

 SoC and MPSoC
 Reconfigurable ASIP
 FPGA, dynamic reconfigurable systems
 Asynchronous circuits (self-timed)
 Analog circuits and mixed-signal circuits
 Biologically based or biologically inspired systems
 MEMS, bioMEMS
 Nano-technologies, quantum computing

Smart sensors

 Vision and audio sensor
 Fingerprint sensor, biosensor
 Structurally-embedded sensor
 Sensing requirements for active control systems
 Distributed and multiplexed sensors, sensors network
 Adaptive sensor, evolutionary sensor
 Sensor for health monitoring
 Sensor system monitoring
 Environmental monitoring

Applications

 Embedded systems for automotive
 Embedded systems for health
 Embedded platforms for multimedia and telecom
 Analog mixed-signal design challenge
 Ambient intelligence, ubiquitous computing
 Wearable computing
 Handheld devices (smart cameras, PDAs, GPSs)
 Security systems, cryptography
 Object recognition and tracking


Special sessions and demonstrations

A number of special sessions are planned during the Conference. We have two special sessions approved so far. If you wish to propose a special session you can still do so by submitting the following via e-mail (in either pdf or plain ascii text form) to [EMAIL PROTECTED]

- Title of the proposed special session
- Rationale of the need for the special session at DASIP 2008
- Short biography of the special session organizers

If you want to contribute to any of the special sessions approved so far (please see below) you should submit your paper via the online submission link. Papers should conform to the formatting and electronic submission guidelines of a regular DASIP paper.

A list of special sessions approved so far:

Special Session 1

Organizers: Yves SOREL, National Institute for Research in Computer Science and Control (INRIA), France and Joël GOOSSENS, Université Libre de Bruxelles (ULB), Belgium

Title: Resource Management Techniques for Real-time Operating Systems in a Co-Design Framework

The session is dedicated to original contributions about resource management techniques for real-time operating systems (RTOS) based on specific and realistic hardware devices in a co-design framework. More precisely, the session will consider research papers which contribute to the techniques (resources management, scheduling, worst case execution time (WCET) characterization, synchronization mechanisms, etc.) used at operating system level but based on realistic, accurate and pragmatic hardware issues. Examples of such hardware issues include but are not limited to: Multi-Processor System-on-Chip (MPSoC) technologies, multi-core architectures, low-power aware platforms, context-switch sensitive systems, caches memory devices, etc. Papers dealing with the fact that the different abstraction layers impact each other in those techniques are welcome.
For further information please e-mail: [EMAIL PROTECTED]  and [EMAIL PROTECTED]

Special Session 2

Organiser: Ahmet T. Erdogan, The University of Edinburgh, UK

Title: Systems and Architectures for Real-time Image Processing

Due to rapid advancements in integrated circuit technology, the rich theoretical results that have been developed by the image and video processing research community are now being increasingly applied in practical systems to solve real-world image and video processing problems. Examples of such systems are mobile phones, digital still/video/cell-phone cameras, portable media players, personal digital assistants, high-definition television, video surveillance systems, industrial visual inspection systems, medical imaging devices, vision-guided autonomous robots, and many other real-time embedded systems. In these real-time systems, strict timing requirements demand that results are available within a certain interval of time as imposed by the application. In addition to these strict timing constraints, these systems also involve constraints such as area and power consumption. This special session brings together practitioners and researchers working in all aspects of real-time image and video processing. It will serve as a forum for exchange of novel ideas on corresponding hardware developments, software tools, system solutions, and all types of applications.

Topics of interest of this special session include, but are not be restricted to:

- Real-time image and video processing algorithms
- Real-time embedded image and video processing systems
- Real-time image and video processing architectures including dynamically reconfigurable architectures (both conventional FPGAs and custom reconfigurable architectures), parallel DSP systems and Media processors, application specific parallel architectures, parallel and distributed architectures
- Real-time hardware/software co-design for image and video processing
- Real-time image and video processing applications including HDTV, set-top boxes, mobile multimedia, smart cameras, machine vision, industrial inspection, surveillance and security, image and video compression for transmission and for database storage and retrieval, biomedical imaging, satellite image processing, etc.

For further information please e-mail: [EMAIL PROTECTED]

Special Session 3

Organiser: Gareth Howells, University of Kent, UK and Klaus McDonald-Maier, University of Essex, UK

Title: "Formal Models, Transformations and Architectures for Reliable Embedded System Design"

Due to the increasing complexity and demand for reliability and integrity there is a mounting pressure for design paradigms that facilitate safety and mission critical operation in embedded software and hardware systems, significantly in transport, industrial control and automotive systems. This special session brings together practitioners and researchers working in reliable embedded system design. This session is dedicated to contributions in the general areas of formal models, transformations and architectures with a focus on reliable embedded system design and their application for specific problems of interest. It will serve as a forum for exchange of novel ideas on corresponding hardware developments, software tools, system solutions, and all types of applications.

Topics of interest of this special session include, but are not be restricted to:
- Model Driven Design
- Design and System Verification
- Applications and algorithms
- Execution platform for automotive and other applications (FPGA, MPSoC, etc)
- Technology design

For further information please e-mail: [EMAIL PROTECTED] and [EMAIL PROTECTED]


Instructions for Authors

Electronic paper submission requires a full paper, up to 8 double-column IEEE format pages, including figures and references. Demonstration papers should not exceed 1 double-column IEEE format page long. Document templates are available at the following address: http://www.ecsi.org/dasip/.

 

Publications of DASIP papers:

- All accepted papers will be published in electronic version on USB key, CD-ROM, and on the web pages (ECSI, EURASIP, DBLP)
- Selected papers will be published in a Special Issue Journal of EURASIP
- The authors of selected papers submitted to DASIP will be invited to prepare an extended manuscript for publication in Signal and Image Processing Architectures book to be published by Springer Science + Business Media publisher.

 


Important Dates

Deadline for paper submission: May 30, 2008 (Extended deadline)

 

Deadline for Special Session proposals: May 26, 2008 (Passeddeadline)

Deadline for Special Session paper submissions: June 16, 2008 (Passeddeadline)

Notification of paper acceptance: July 18, 2008

Final camera-ready papers due: October 10, 2008

 


Sponsoring Organisations

DASIP Conference is sponsored by ECSI, EURASIP and Universite Libre de Bruxelles

The event is technically co-sponsored by IEEE Benelux Section and IEEE France Section


Additional Information & Workshop Web Site 

For additional information about the event please visit the Web Site: 
http://www.ecsi.org/dasip/     

Please, transfer this message to persons interested in this topic!

 

We apologise if you've received multiple copies of this message!   

If you want to be removed from this mailing list please reply to this message with the title REMOVE.

                                                                         


 

_________________________________________________________________________________
mozart-users mailing list                               
[email protected]
http://www.mozart-oz.org/mailman/listinfo/mozart-users

Reply via email to