Hi
I propose some new mpn functions/macro's left and right shift by 1 bit say called mpn_lshift1 , but with no partial overlap of source and destination. Quite a few cpus should be able to use their mpn_add_n for the mpn_lshift1 so not just the K8 will benefit. On the K8 I have a general shift running at 2.21c/l and a shift by 1 running at 1.28c/l (left and right). For cpus where we dont have a native version we can just define mpn_lshift1 as a macro to call mpn_lshift(....,1) , no loss of speed and no backwards compatibility issues. Looking at the existing mpir code you can see quite a few instances where we have a fixed shift of 1 , and the correct overlap restrictions. Some new HAVE_NATIVE functions (ie like mpn_addlsh1_n) mpn_addadd_n() mpn_addsub_n() which are (rp,n)=(s1p,n)+(s2p,n)+-(s3p,n) for example on the K8 , two adds are 3.0c/l but addadd is 2.25c/l the existing mpn_mul_kara can use both of these. Another possible use of mpn_addsub_n is modulo addition , although you best test the high limb first. Note: the name above mpn_addsub_n conflicts with an existing function which calculates the sum and diff , but its undocumented so we could change the name --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "mpir-devel" group. To post to this group, send email to mpir-devel@googlegroups.com To unsubscribe from this group, send email to mpir-devel+unsubscr...@googlegroups.com For more options, visit this group at http://groups.google.com/group/mpir-devel?hl=en -~----------~----~----~----~------~----~------~--~---
