Hi all,
The attached files are headers to add support for the ADC10 module, and
the MSP430x12x2, which use that module.
Regards,
Steve
#ifndef __msp430_headers_ADC10_h
#define __msp430_headers_ADC10_h
/* adc10.h
*
* mspgcc project: MSP430 device headers
* ADC10 module header
*
* (c) 2002 by Steve Underwood <[email protected]>
* Originally based in part on work by Texas Instruments Inc.
*
* $Id: adc10.h,v 1.0 2002/08/10 17:00:00 data Exp $
*/
/* Switches: none */
#define ADC10DTC0_ 0x0048 /* ADC10 Data Transfer Control 0 */
sfrb(ADC10DTC0, ADC10DTC0_);
#define ADC10DTC1_ 0x0049 /* ADC10 Data Transfer Control 1 */
sfrb(ADC10DTC1, ADC10DTC1_);
#define ADC10AE_ 0x004A /* ADC10 Analog Enable */
sfrb(ADC10AE, ADC10AE_);
#define ADC10CTL0_ 0x01B0 /* ADC10 Control 0 */
sfrw(ADC10CTL0, ADC10CTL0_);
#define ADC10CTL1_ 0x01B2 /* ADC10 Control 1 */
sfrw(ADC10CTL1, ADC10CTL1_);
#define ADC10MEM_ 0x01B4 /* ADC10 Memory */
sfrw(ADC10MEM, ADC10MEM_);
#define ADC10SA_ 0x01BC /* ADC10 Data Transfer Start Address */
sfrw(ADC10SA, ADC10SA_);
#define ADC10SC 0x001 /* ADC10CTL0 */
#define ENC 0x002
#define ADC10IFG 0x004
#define ADC10IE 0x008
#define ADC10ON 0x010
#define REFON 0x020
#define REF2_5V 0x040
#define MSC 0x080
#define REFBURST 0x100
#define REFOUT 0x200
#define ADC10SR 0x400
#define ADC10SHT_0 (0*0x800) /* 4 x ADC10CLKs */
#define ADC10SHT_1 (1*0x800) /* 8 x ADC10CLKs */
#define ADC10SHT_2 (2*0x800) /* 16 x ADC10CLKs */
#define ADC10SHT_3 (3*0x800) /* 64 x ADC10CLKs */
#define SREF_0 (0*0x2000) /* VR+ = AVCC and VR- = AVSS */
#define SREF_1 (1*0x2000) /* VR+ = VREF+ and VR- = AVSS */
#define SREF_2 (2*0x2000) /* VR+ = VEREF+ and VR- = AVSS */
#define SREF_3 (3*0x2000) /* VR+ = VEREF+ and VR- = AVSS */
#define SREF_4 (4*0x2000) /* VR+ = AVCC and VR- = VREF-/VEREF- */
#define SREF_5 (5*0x2000) /* VR+ = VREF+ and VR- = VREF-/VEREF- */
#define SREF_6 (6*0x2000) /* VR+ = VEREF+ and VR- = VREF-/VEREF-
*/
#define SREF_7 (7*0x2000) /* VR+ = VEREF+ and VR- = VREF-/VEREF-
*/
#define ADC10BUSY (0x0001) /* ADC10CTL1 */
#define CONSEQ_0 (0*2) /* Single channel single conversion */
#define CONSEQ_1 (1*2) /* Sequence of channels */
#define CONSEQ_2 (2*2) /* Repeat single channel */
#define CONSEQ_3 (3*2) /* Repeat sequence of channels */
#define ADC10SSEL_0 (0*8) /* ADC10OSC */
#define ADC10SSEL_1 (1*8) /* ACLK */
#define ADC10SSEL_2 (2*8) /* MCLK */
#define ADC10SSEL_3 (3*8) /* SMCLK */
#define ADC10DIV_0 (0*0x20)
#define ADC10DIV_1 (1*0x20)
#define ADC10DIV_2 (2*0x20)
#define ADC10DIV_3 (3*0x20)
#define ADC10DIV_4 (4*0x20)
#define ADC10DIV_5 (5*0x20)
#define ADC10DIV_6 (6*0x20)
#define ADC10DIV_7 (7*0x20)
#define ISSH (0x0100)
#define ADC10DF (0x0200)
#define SHS_0 (0*0x400) /* ADC10SC */
#define SHS_1 (1*0x400) /* TA3 OUT1 */
#define SHS_2 (2*0x400) /* TA3 OUT0 */
#define SHS_3 (3*0x400) /* TA3 OUT2 */
#define INCH_0 (0*0x1000)
#define INCH_1 (1*0x1000)
#define INCH_2 (2*0x1000)
#define INCH_3 (3*0x1000)
#define INCH_4 (4*0x1000)
#define INCH_5 (5*0x1000)
#define INCH_6 (6*0x1000)
#define INCH_7 (7*0x1000)
#define INCH_8 (8*0x1000)
#define INCH_9 (9*0x1000)
#define INCH_10 (10*0x1000)
#define INCH_11 (11*0x1000)
#define INCH_12 (12*0x1000) /* Selects channel 11 */
#define INCH_13 (13*0x1000) /* Selects channel 11 */
#define INCH_14 (14*0x1000) /* Selects channel 11 */
#define INCH_15 (15*0x1000) /* Selects channel 11 */
#define ADC10FETCH (0x001) /* ADC10DTC0 */
#define ADC10B1 (0x002)
#define ADC10CT (0x004)
#define ADC10TB (0x008)
#define ADC10DISABLE (0x000) /* ADC10DTC1 */
#endif
#ifndef __msp430x12x2
#define __msp430x12x2
/* msp430x12x2.h
*
* mspgcc project: MSP430 device headers
* MSP430x12x2 family header
*
* (c) 2002 by Steve Underwood <[email protected]>
* Originally based in part on work by Texas Instruments Inc.
*
* $Id: msp430x12x2.h,v 1.0 2002/08/10 17:00:00 data Exp $
*/
#include <iomacros.h>
#define __msp430_have_port1
#define __msp430_have_port2
#define __msp430_have_port3
#include <msp430/usart.h>
#include <msp430/gpio.h>
#include <msp430/timera.h>
#include <msp430/basic_clock.h>
#include <msp430/flash.h>
#include <msp430/adc10.h>
#include <msp430/common.h>
#define IE1_ 0x0000 /* Interrupt Enable 1 */
sfrb ( IE1 ,IE1_);
#define WDTIE 0x01
#define OFIE 0x02
#define NMIIE 0x10
#define ACCVIE 0x20
#define IFG1_ 0x0002 /* Interrupt Flag 1 */
sfrb ( IFG1 ,IFG1_);
#define WDTIFG 0x01
#define OFIFG 0x02
#define NMIIFG 0x10
#define IE2_ 0x0001 /* Interrupt Enable 2 */
sfrb ( IE2 ,IE2_);
#define URXIE0 0x01
#define UTXIE0 0x02
#define IFG2_ 0x0003 /* Interrupt Flag 2 */
sfrb ( IFG2 ,IFG2_);
#define URXIFG0 0x01
#define UTXIFG0 0x02
#define ME2_ 0x0005 /* Module Enable 2 */
sfrb ( ME2 ,ME2_);
#define URXE0 0x01
#define USPIE0 0x01
#define UTXE0 0x02
#define PORT1_VECTOR 4 // 2 * 2 /* 0xFFE4 Port 1 */
#define PORT2_VECTOR 6 // 3 * 2 /* 0xFFE6 Port 2 */
#define UART0TX_VECTOR 12 // 6 * 2 /* 0xFFEC UART 0 Transmit */
#define UART0RX_VECTOR 14 // 7 * 2 /* 0xFFEE UART 0 Receive */
#define TIMERA1_VECTOR 16 // 8 * 2 /* 0xFFF0 Timer A CC1-2, TA */
#define TIMERA0_VECTOR 18 // 9 * 2 /* 0xFFF2 Timer A CC0 */
#define WDT_VECTOR 20 // 10 * 2 /* 0xFFF4 Watchdog Timer */
#define COMPARATORA_VECTOR 22 // 11 * 2 /* 0xFFF6 Comparator A */
#define NMI_VECTOR 28 // 14 * 2 /* 0xFFFC Non-maskable */
#endif /* #ifndef __msp430x12x2 */
