David Dyck wrote:
The cgi assembler at
http://mspgcc.sourceforge.net/assemble.html
generates
push #4 (2 cycles)
OPC 0x1222
...
but the errata descriptions at
http://www.ti.com/sc/cgi-bin/buglist.cgi
for many MSP430's list the CPU4 bug, and indicate
that the assembler will generate a 2 word instruction
for both the push #4 and push #8. (The msp430 binutils
assembler as does generate push #4 as 2 words,
like the sourceforge cgi tool does for push #8)
the bug wasnt there when i wrote that cgi ;-)
well, at least i have not seen i back then... anyway, i fixed that
It is interesting to note the the CPU4 bug report
states a different number of cycles for both
types of instructions
....
The number of clock cyles is different: PUSH
#CG uses address mode 00, requiring 3 cycles, 1
word instruction PUSH #4/#8 uses address mode
11, requiring 5 cycles, 2 word instruction
Workaround implemented in assembler. No fix
planned.
well, the cycle numbers from the cgi are the same as written in the 1xx
family guide from 2000. and it states 4 cycles for this operation
("call" has 5 in the same addressing mode)
chris
