Hi Steve, Thanks for your prompt reply.
OK on the revised header file. The version I have is from mspgcc-20030506.exe, so is probably not the latest. I will have a go at getting the latest from CVS as you suggest. OK also that it probably doesn't matter if the XT2OF bit is read only..though one might have hoped that TI would get it right ;-) When I run the code it drops out through the bottom, so XT2 should be OK to use. Is there a newer hardware manual than SLAU056C ? This version definitely says that: a) XT2OFF defaults to 1 after Power On Clear b) XT2OFF is 1 to disable XT2 and 0 to enable XT2. However it implies that if you try and use XT2 for MCLK or SMCLK when the bit is set it will turn XT2 on. Perhaps this is just a bad description of the function of the bit. I'll try it the other way up! Your comment about the documentation being a WOD makes me feel a bit better, I was beginning to think that it was just me! Thanks also for the additional info about the internal checking of the clocks before swapping to them. With this in mind I will remove the potentially endless loop if XT2 really doesn't work. Regards, Martin. > -----Original Message----- > From: Steve Underwood [SMTP:[email protected]] > Sent: 10 June 2003 10:27 > To: [email protected] > Subject: Re: [Mspgcc-users] msp430F435 using XT1 > > Hi Martin, > > [email protected] wrote: > > >Hi, > > > >Firstly, a big thank you to all who have laboured long and hard to > provide > >such a good set of free tools for the MSP430 family. > > > >Now a question... > > > >Does anyone have experience of running an msp430F435 from a crystal on > XT2? > >I have a 32768Hz crystal on Xin/Xout and a 4MHz (plus caps) on > XT2in/XT2out. > >Using a scope on XT2out I can see that the 4MHz crystal does start up at > the > >correct frequency when the code is run, but MCLK never changes from the > >default 32 times 32768 to 4MHz. > > > >My code, shown below, is based on one of the TI examples (Fet440_clks2.c > >from slac019.zip). > > > >Two things in particular worry me: > >1) The XT2OF (Oscillator XT2 Fault flag) is not defined in mspgcc header > >file "basic_clock.h". Perhaps the hardware does not really work. > > > If you get the latest version from CVS it does define XT2OF. The guy who > wrote the basic_clock.h based it on the FLL in the 412/413. The 43x and > 44x have an FLL+, with the second crystal oscillator. basic_clock.h, > msp430x43x.h and msp430x44x.h were recently updated to provide the extra > definitions for XT2 present and enable them for the 43x and 44x parts. I > think XT2OF was missed that time, and added last month. As far as I > know, the version in CVS is correct for the 43x and 44x parts. > > >2) The User Manual (rev C) says that the XT2OF bit is read only, yet TI > >example code writes to it! > > > I'm not sure whether XT2OF is read only or not, but that shouldn't > really matter much here. If you cannot write to it, the write should be > harmless anyway. > > >// Put the MCLK out on pin 66 > > P1DIR |= 0x02; > > P1SEL |= 0x02; > > > >// Lets start the 4MHz Oscillator > > > > FLL_CTL1 = FLL_CTL1 & ~XT2OFF; // clear bit = high freq xtal on > > > > do // loop until flag is clear > > { > > FLL_CTL0 = FLL_CTL0 & ~XT2OF; // clear high freq > >oscillator fault flag > > for (i = 50000; i; i--); // delay for crystal to > >start and FLL to lock > > } > > while (FLL_CTL0 & XT2OF); // test high freq oscillator fault > >flag > > > > FLL_CTL1 = SELM_XT2; // SMCLK=on, XT2CLK=on, > >MCLK=XT2, SMCLK=DCO, ACLKdiv=1 > > > > > You don't say what happens to your code. Does it fall out of the loop > when then XT2 is declared OK, or is it getting stuck in the loop? > According to the manual I am looking at, XT2OFF=0 means XT2 is off, and > XT2OFF=1 means XT2 is on. That seems the opposite to what you do. > > It is important to take care of the sequence of events when changing > clocks. The hardware is designed to avoid clock changes that might leave > the CPU stranded without any clock at all (although I think there are > some combinations of events that might still achieve this). Until XT2OF > is saying OK, requests to use it as a system clock will change the > register bits, but not actually change the clock. If the XT2OF later > says OK, the system clock will then obey the register settings you have > given. So, it is actually OK to select XT2 as the MCLK or SMCLK before > it has had time to start and settle, as it will not actually be used > until it is declared OK. > > Regards, > Steve > > > > > ------------------------------------------------------- > This SF.net email is sponsored by: Etnus, makers of TotalView, The best > thread debugger on the planet. Designed with thread debugging features > you've never dreamed of, try TotalView 6 free at www.etnus.com. > _______________________________________________ > Mspgcc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mspgcc-users > > +++ Virus-scanned by Messagelabs for Oxford Instruments +++ > ### OXFORD INSTRUMENTS http://www.oxford-instruments.com/ ### Unless stated above to be non-confidential, this E-mail and any attachments are private and confidential and are for the addressee only and may not be used, copied or disclosed save to the addressee. If you have received this E-mail in error please notify us upon receipt and delete it from your records. Internet communications are not secure and Oxford Instruments is not responsible for their abuse by third parties nor for any alteration or corruption in transmission.
