Hi Steve,
The TX interrupt 'problem' can be solved by setting the UART TX interrupt flag
before enabling the TX interrupt. My TX ISR looks like this:
interrupt (UART0TX_VECTOR)
SE_TxIsr
(
void
)
{
if ( txBufferRd != txBufferWr )
{
/* -------------------------------------
* Put the character in the UART buffer.
*/
SndChar( txBuffer[ txBufferRd ] );
/* ---------------------------------------
* Let txBufferRd point to the next entry.
*/
txBufferRd = ( txBufferRd + 1 ) % TX_BUFFER_SIZE;
}
else
{
/* -----------------------------------------------------------------
* Stop the show because there are no more characters to be send !!!
*/
GP_CLRBIT( U0IE, UTXIE0 );
/* -------------------------------------------------------
* Set the interrupt flag to generate an UART TX interrupt
* when the UART TX interrupt is enabled again.
*/
GP_SETBIT( U0IFG, UTXIFG0 );
}
}
>>> Steve Underwood <[email protected]> 02/05/04 12:53AM >>>
James Henry Dodd wrote:
>Hi Robert,
>
>If things aren't working, are you sure you followed the UART setup sequence
>properly?
>Quoting slau049c.pdf from Texas:
>"...
>The required USART initialization/re-configuration process is:
>1) Set SWRST (BIS.B #SWRST,&UxCTL)
>2) Initialize all USART registers with SWRST = 1 (including UxCTL)
>3) Enable USART module via the MEx SFRs (URXEx and/or UTXEx)
>4) Clear SWRST via software (BIC.B #SWRST,&UxCTL)
>5) Enable interrupts (optional) via the IEx SFRs (URXIEx and/or UTXIEx)
>Failure to follow this process may result in unpredictable USART behavior.
>..."
>
>IMHO, the behaviour isn't unpredictable: it's sure not to work! :)
>
>Cheers,
>
>James
>
>
It is somewhat unpredictable, but you are right - it doesn't work
correctly. However, even following this procedure I have encountered
something odd. When you initially enable the transmit interrupt you
would expect am immediate tx empty interrupt (unless you had just
stuffed a value into TXBUF). That is what happens with most UARTS.
However, I have found I need to write a value into TXBUF to kick the
interrupt mechanism into life. After that, the tx empty interrupts occur
as expected.
Regards,
Steve
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