Hi Dmitry, If compiling the code you provided with (CVS Version build on 2009-04-03)
msp430-gcc -mmcu=msp430x2418 -S main.c I get: /*********************** * Interrupt Service Routine `USCI0RX_ISR' at 0xffce ***********************/ vector_*ffce*: USCI0RX_ISR: which looks wrong. changing #include "msp430x24x.h" to #include "msp430x24*1*x.h" I get /*********************** * Interrupt Service Routine `USCI0RX_ISR' at 0xffee ***********************/ vector_*ffee*: USCI0RX_ISR: which is OK for an msp430F24*1*8 (see signal.h gcrt0.S and page 15 of http://focus.ti.com/lit/ds/symlink/msp430f2418.pdf ) I would expect, that compiled with #include "msp430x2*4x*.h" and -mmcu=MSP430x24*1*8 USCI0RX_ISR(void) is *never *called, because its address is in interrupt slot vector_ff*c*e* *but called is the routine which address is in interrupt slot vector_ff*e*e So make sure, that all further testing is done with #include "msp430x24*1*x.h" when compiling with msp430-gcc -mmcu=MSP430x24*1*8 For mspgcc it would be best, to include io.h instead of a device specific header file, because io.h together with -mmcu=msp430x24*1*8 leads to the correct include. Good Luck Matthias Hartmann Dmitry Zuikov schrieb: > Greetings, > > Could anybody provide an assistance (not for free, of course) porting > our application from MSP430F1612 to MSP430F2418 ? > > I faced problems even when I try to launch an example from TI site > adapted for gcc (code is below). > > This code works ok under IAR, but there is no any response in port under > MSPGCC. > > I built mspgcc from cvs. > > code (adapted MSP430x261x_uscia0_uart_03.c ) > //****************************************************************************** > // MSP430x26x Demo - USCI_A0, Ultra-Low Pwr UART 9600 Echo ISR, 32kHz > ACLK > // > // Description: Echo a received character, RX ISR used. Normal mode is > LPM3, > // USCI_A0 RX interrupt triggers TX Echo. > // ACLK = BRCLK = LFXT1 = 32768Hz, MCLK = SMCLK = DCO ~1.045MHz > // Baud rate divider with 32768Hz XTAL @9600 = 32768Hz/9600 = 3.41 > // //* An external watch crystal is required on XIN XOUT for ACLK *// > // > // MSP430F261x/241x > // ----------------- > // /|\| XIN|- > // | | | 32kHz > // --|RST XOUT|- > // | | > // | P3.4/UCA0TXD|------------> > // | | 9600 - 8N1 > // | P3.5/UCA0RXD|<------------ > // > // B. Nisarga > // Texas Instruments Inc. > // September 2007 > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: > 3.42A > //****************************************************************************** > #include "msp430x24x.h" > #include <signal.h> > #include <stdlib.h> > > void main(void) > { > WDTCTL = WDTPW + WDTHOLD; // Stop WDT > P3OUT &= ~(BIT4+BIT5); > P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD > UCA0CTL1 |= UCSSEL_1; // CLK = ACLK > UCA0BR0 = 0x03; // 32kHz/9600 = 3.41 > UCA0BR1 = 0x00; // > UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 > UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state > machine** > IE2 |= UCA0RXIE; // Enable USCI_A0 RX > interrupt > > //eint(); > //__bis_SR_register(LPM3_bits + GIE); // Enter LPM3, interrupts > enabled > for(;;); > } > > // Echo back RXed character, confirm TX buffer is ready first > interrupt ( USCIAB0RX_VECTOR ) wakeup USCI0RX_ISR(void) > { > while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? > UCA0TXBUF = UCA0RXBUF; // TX -> RXed character > } > > > > > ------------------------------------------------------------------------------ > _______________________________________________ > Mspgcc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mspgcc-users > > > >
