the divider by 32K is fine for the initialization routines, but there are many other values available with the newer x5xx family. Copy&paste from the family guide of the settings:
000 Watchdog clock source /2G (18:12:16 at 32 kHz) 001 Watchdog clock source /128M (01:08:16 at 32 kHz 010 Watchdog clock source /8192k (00:04:16 at 32 kHz) 011 Watchdog clock source /512k (00:00:16 at 32 kHz) 100 Watchdog clock source /32k (1 s at 32 kHz) 101 Watchdog clock source /8192 (250 ms at 32 kHz) 110 Watchdog clock source /512 (15,6 ms at 32 kHz) 111 Watchdog clock source /64 (1.95 ms at 32 kHz) so with a 32.768Hz watch crystal and the 512K divider, you get exactly 16 seconds; by running the watchdog on the 12KHz VLO clock, you get a little over 40s. R# 2009/4/7 Hardy Griech <[email protected]>: > JMGross wrote: > : >> I you require a WDT for environment stability (and not just to circumvent >> code deadlocks due to poorly written code) then the WDT may not be disabled >> EVER. It is on at startup and it has to stay on. period. >> If you don't need it, well, maybe a faster startup that disables WDT is >> nice. And if you KNOW that htis happens wihtout digging into linker listings >> or library source code, it is even nicer. But in case you NEED the >> WDT to ensure device crash recovery, there must be a way to never disable it >> at all. > : > > Good point. But what should one do in low power applications where the > µC is _most_ of the time in LPM3? Eg my application allows LPM3 > durations of 16s. How does that fit with a WDT with 1s timeout? > > Hardy > > ------------------------------------------------------------------------------ > This SF.net email is sponsored by: > High Quality Requirements in a Collaborative Environment. > Download a free trial of Rational Requirements Composer Now! > http://p.sf.net/sfu/www-ibm-com > _______________________________________________ > Mspgcc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mspgcc-users >
