Hi all

I would like to contribute these two patches:

gcc-3.3.64kjumptables:
adds support for jumptables (switch/case statement) in functions in mem>64k
fixes a bug for functions where parameters are put on the stack (as
calla puts a 4byte return address on the stack, and call only 2 bytes)

bsl.py.extendedmem:
add support for ihex reccord "extended segment address" (for images with
 code/data > 64k)
support mslbsl command to write to extended memory
i have already posted parts of this patch in an earlier email

both patches are against current MSP430X branch.
I wonder, if there is currently somebody else working on better support
for MSP430X and far memory. Anyway, I am glad to get some feedback and I
am also interested in further improving mspgcc.

Roman
Index: python/mspgcc/bsl.py
===================================================================
RCS file: /cvsroot/mspgcc/python/mspgcc/bsl.py,v
retrieving revision 1.2
diff -u -p -r1.2 bsl.py
--- python/mspgcc/bsl.py	23 Apr 2006 21:37:35 -0000	1.2
+++ python/mspgcc/bsl.py	7 May 2009 12:51:39 -0000
@@ -179,6 +179,7 @@ q
 #cpu types for "change baudrate"
 #use strings as ID so that they can be used in outputs too
 F1x                     = "F1x family"
+F2x                     = "F2x family"
 F4x                     = "F4x family"
 
 #known device list
@@ -194,6 +195,7 @@ deviceids = {
     0xf427: F4x,
     0xf439: F4x,
     0xf449: F4x,
+    0xf26f: F2x,
 }
 
 class BSLException(Exception):
@@ -212,6 +214,7 @@ class LowLevel:
     BSL_ERASE               = 0x16 #Erase one segment
     BSL_MERAS               = 0x18 #Erase complete FLASH memory
     BSL_CHANGEBAUD          = 0x20 #Change baudrate
+    BSL_SETMEMOFFSET        = 0x21 #MemoryAddress = OffsetValue << 16 + Actual Address
     BSL_LOADPC              = 0x1A #Load PC and start execution
     BSL_TXVERSION           = 0x1E #Get BSL version
 
@@ -277,6 +280,7 @@ class LowLevel:
         self.protocolMode = self.MODE_BSL
         self.BSLMemAccessWarning = 0            #Default: no warning.
         self.slowmode = 0                       #give a little more time when changing the control lines
+        self.memoffset = 0
 
     def comInit(self, port):
         """Tries to open the serial port given and
@@ -574,15 +578,26 @@ class LowLevel:
             if (length % 2) != 0:
                 length = length + 1
 
+        if (self.bslVer >= 0x0212) & (cmd == self.BSL_TXBLK) | (cmd == self.BSL_RXBLK):
+            if (self.memoffset!=(addr>>16)):
+                self.memoffset = (addr>>16)
+                self.bslTxRx(self.BSL_SETMEMOFFSET, self.memoffset)
+                if DEBUG > 1: sys.stderr.write("   * bslTxRx(): set mem offset 0x%02x\n" % self.memoffset)
+            addr &= 0xffff	
+        
         #if cmd == self.BSL_TXBLK or cmd == self.BSL_TXPWORD:
         #    length = len + 4
 
         #Add necessary information data to frame
-        dataOut =  struct.pack("<HH", addr, length)
+        if (cmd == self.BSL_SETMEMOFFSET):
+            dataOut =  struct.pack("<HH", length, addr)
+        else:
+            dataOut =  struct.pack("<HH", addr, length)
 
         if blkout: #Copy data out of blkout into frame
             dataOut = dataOut + blkout
 
+        if DEBUG > 1: sys.stderr.write("   CMD 0x%04x\n" % cmd)
         self.bslSync(wait)                          #synchronize BSL
         rxFrame = self.comTxRx(cmd, dataOut, len(dataOut))  #Send frame
         if rxFrame:                                 #test answer
@@ -675,7 +690,7 @@ class BootStrapLoader(LowLevel):
         self.verifyBlk(addr, blkout, action & self.ACTION_ERASE_CHECK)
 
         if action & self.ACTION_PROGRAM:
-            if DEBUG: sys.stderr.write("  Program starting at 0x%04x, %i bytes ...\n" % (addr, len(blkout)))
+            if DEBUG: sys.stderr.write("  Program starting at 0x%05x, %i bytes ...\n" % (addr, len(blkout)))
             self.preparePatch()
             #Program block
             self.bslTxRx(self.BSL_TXBLK, addr, len(blkout), blkout)
@@ -1000,6 +1015,11 @@ class BootStrapLoader(LowLevel):
             57600:[0x0000, 0x0003],     #nonstandard XXX BSL dummy BCSCTL settings!
            115200:[0x0000, 0x0004],     #nonstandard XXX BSL dummy BCSCTL settings!
         },
+        F2x: {
+             9600:[0x8580, 0x0000],  
+            19200:[0x8b00, 0x0001],
+            38400:[0x8c80, 0x0002],
+        },
         F4x: {
              9600:[0x9800, 0x0000],
             19200:[0xb000, 0x0001],
Index: python/mspgcc/memory.py
===================================================================
RCS file: /cvsroot/mspgcc/python/mspgcc/memory.py,v
retrieving revision 1.4
diff -u -p -r1.4 memory.py
--- python/mspgcc/memory.py	22 May 2008 16:20:02 -0000	1.4
+++ python/mspgcc/memory.py	7 May 2009 12:51:39 -0000
@@ -53,13 +53,14 @@ class Memory:
         segmentdata = []
         currentAddr = 0
         startAddr   = 0
+        extendAddr  = 0
         lines = file.readlines()
         for l in lines:
             if not l.strip(): continue  #skip empty lines
             if l[0] != ':': raise FileFormatError("line not valid intel hex data: '%s...'" % l[0:10])
             l = l.strip()               #fix CR-LF issues...
             length  = int(l[1:3],16)
-            address = int(l[3:7],16)
+            address = int(l[3:7],16) + extendAddr
             type    = int(l[7:9],16)
             check   = int(l[-2:],16)
             if type == 0x00:
@@ -71,7 +72,9 @@ class Memory:
                 for i in range(length):
                     segmentdata.append( chr(int(l[9+2*i:11+2*i],16)) )
                 currentAddr = length + currentAddr
-            elif type in (0x01, 0x02, 0x03, 0x04, 0x05):
+            elif type == 0x02:
+                extendAddr =  int(l[9:13],16) << 4      
+            elif type in (0x01, 0x03, 0x04, 0x05):
                 pass
             else:
                 sys.stderr.write("Ignored unknown field (type 0x%02x) in ihex file.\n" % type)
Index: gcc/gcc-3.3/gcc/config/msp430/msp430.c
===================================================================
RCS file: /cvsroot/mspgcc/gcc/gcc-3.3/gcc/config/msp430/msp430.c,v
retrieving revision 1.99.2.5
diff -u -p -r1.99.2.5 msp430.c
--- gcc/gcc-3.3/gcc/config/msp430/msp430.c	12 Feb 2009 13:51:42 -0000	1.99.2.5
+++ gcc/gcc-3.3/gcc/config/msp430/msp430.c	7 May 2009 08:42:16 -0000
@@ -574,7 +574,7 @@ encode_section_info (decl)
       static const char *const dsec = ".fartext";
       DECL_SECTION_NAME (decl) = build_string (strlen (dsec), dsec);
     }
-  if (DECL_READONLY_SECTION (decl, 0) && msp430_far_object_p(decl))
+  if (DECL_P(decl) && DECL_READONLY_SECTION (decl, 0) && msp430_far_object_p(decl))
     {
       static const char *const dsec = ".farrodata";
       DECL_SECTION_NAME (decl) = build_string (strlen (dsec), dsec);
@@ -3153,7 +3153,7 @@ msp430_output_addr_vec_elt (stream, valu
      FILE *stream;
      int value;
 {
-  fprintf (stream, "\t.word	.L%d\n", value);
+  fprintf (stream, CHECK_JUMP_SIZE("\t.word	.L%d\n", msp430_in_fartext_section()?"\t.long	.L%d\n":"\t.word	.L%d\n"), value);
   jump_tables_size++;
 }
 
@@ -6782,6 +6782,33 @@ msp430_emit_bleu (operands, len)
   return "";
 }
 
+enum machine_mode
+msp430_case_vector_mode()
+{
+  if (TARGET_ALL_DEBUG)
+    fprintf (stderr, "DEBUG: Vector mode far = %i\n", msp430_far_object_p(current_function_decl));
+  return CHECK_JUMP_SIZE(HImode, msp430_far_object_p(current_function_decl)?SImode:HImode);
+}
+
+/* only valid for text section. */
+int
+msp430_in_fartext_section ()
+{
+  if (TARGET_ALL_DEBUG)
+    fprintf (stderr, "DEBUG: fartext section output = %i\n", !in_text_section());
+  return !in_text_section();
+}
+
+const char *
+msp430_emit_bra (operands)
+     rtx operands[];
+{
+  if (msp430_in_fartext_section())
+    output_asm_insn ("movx.a\t%0, r0;\t%1", operands); // need 20bit base address
+  else
+    output_asm_insn ("br\t%0;\t%1", operands);
+  return "";
+}
 
 /* SHIFT GUARDS */
 int
Index: gcc/gcc-3.3/gcc/config/msp430/msp430.h
===================================================================
RCS file: /cvsroot/mspgcc/gcc/gcc-3.3/gcc/config/msp430/msp430.h,v
retrieving revision 1.49.2.2
diff -u -p -r1.49.2.2 msp430.h
--- gcc/gcc-3.3/gcc/config/msp430/msp430.h	5 Feb 2009 01:29:37 -0000	1.49.2.2
+++ gcc/gcc-3.3/gcc/config/msp430/msp430.h	7 May 2009 08:42:16 -0000
@@ -896,7 +896,7 @@ referred_reload_class(X,CLASS)
    If `ARGS_GROW_DOWNWARD', this is the offset to the location above
    the first location at which outgoing arguments are placed.  */
 
-#define FIRST_PARM_OFFSET(FUNDECL) 0
+#define FIRST_PARM_OFFSET(FUNDECL) CHECK_JUMP_SIZE(0,2)
 /* Offset from the argument pointer register to the first argument's
    address.  On some machines it may depend on the data type of the
    function.
@@ -1915,7 +1915,7 @@ farrodata_section (void)                
    Do not define this macro if you put all constants in the read-only
    data section.  */
 
-#define JUMP_TABLES_IN_TEXT_SECTION 0
+#define JUMP_TABLES_IN_TEXT_SECTION 1
 /* Define this macro if jump tables (for `tablejump' insns) should be
    output in the text section, along with the assembler instructions.
    Otherwise, the readonly data section is used.
@@ -2700,7 +2700,7 @@ fprintf (STREAM, "\t.p2align %d,0\n", PO
    command to advance the location counter to a multiple of 2 to the
    POWER bytes.  POWER will be a C expression of type `int'.  */
 
-#define CASE_VECTOR_MODE HImode
+#define CASE_VECTOR_MODE msp430_case_vector_mode()
 /* An alias for a machine mode name.  This is the machine mode that
    elements of a jump-table should have.  */
 
Index: gcc/gcc-3.3/gcc/config/msp430/msp430.md
===================================================================
RCS file: /cvsroot/mspgcc/gcc/gcc-3.3/gcc/config/msp430/msp430.md,v
retrieving revision 1.64.2.1
diff -u -p -r1.64.2.1 msp430.md
--- gcc/gcc-3.3/gcc/config/msp430/msp430.md	26 Jan 2009 15:57:17 -0000	1.64.2.1
+++ gcc/gcc-3.3/gcc/config/msp430/msp430.md	7 May 2009 08:42:17 -0000
@@ -3269,10 +3269,10 @@ and\\t#0xff00, %0"
 
 ;; Table helper
 (define_insn "tablejump"
-  [(set (pc) (match_operand:HI 0 "general_operand" "rRP,i,m"))
+  [(set (pc) (match_operand 0 "general_operand" "rRP,i,m"))
    (use (label_ref (match_operand 1 "" "")))]
   ""
-  "* return CHECK_JUMP_SIZE(\"br\\t%0\\t;\\t%1\", \"bra\\t%0\\t;\\t%1\"); "
+  "* return CHECK_JUMP_SIZE(\"br\\t%0\\t;\\t%1\", msp430_emit_bra(operands)); "
  [(set_attr "length" "1,2,2")   
    (set_attr "cc" "clobber")])
 
Index: gcc/gcc-3.3/gcc/config/msp430/t-msp430
===================================================================
RCS file: /cvsroot/mspgcc/gcc/gcc-3.3/gcc/config/msp430/t-msp430,v
retrieving revision 1.28.2.1
diff -u -p -r1.28.2.1 t-msp430
--- gcc/gcc-3.3/gcc/config/msp430/t-msp430	26 Jan 2009 15:57:17 -0000	1.28.2.1
+++ gcc/gcc-3.3/gcc/config/msp430/t-msp430	7 May 2009 08:42:17 -0000
@@ -180,10 +180,13 @@ MULTILIB_DIRNAMES += no-hwmul
 # to achieve the same effect, i.e. to allow compile and link program for different mcu's with the same
 # compile/link options. If we exclude some combination, default library (i.e. msp1 lib from root) 
 # will be linked even for 430Xcore mcu when excluded set of options used.
+# Exceptions are neither built nor linked. Therefore the same compile/link options for different mcu's won't work.
 MULTILIB_EXCEPTIONS += \
     mdisable-hwmul* \
     mmcu=msp430x2232/*mdisable-hwmul* \
-    mmcu=msp430x2416/*mdisable-hwmul* \
+    
+# Actually, msp430x2416 has a hw multiplier
+#   mmcu=msp430x2416/*mdisable-hwmul* \
 
 MULTILIB_EXCLUSIONS = \
 

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