Hi, theses MCU have IO ports with internals pull-up/pull-down.
_MSP430_HAS_PORT??_R__ updated in msp430x47xx.h file
__MSP430_HAS_PORT9_R__ and __MSP430_HAS_PORT10_R__ added in gpio.h file
Regards, Thierry
============== msp430-libc/include/msp430x47xx.h ==============
#if !defined(__msp430x47xx)
#define __msp430x47xx
/* msp430x47xx.h
*
* mspgcc project: MSP430 device headers
* MSP430x47xx family header
*
* (c) 2006 by Steve Underwood <[email protected]>
* Originally based in part on work by Texas Instruments Inc.
*
* 2008-10-08 - sb-sf ([email protected])
* - created, based on msp430xG461x.h
*
* 2009-06-04 - THLN
* - for msp430x47xx
* - __MSP430_HAS_PORT??_R__ updated
*
* $Id: msp430x47xx.h,v 1.5 2009/03/22 11:37:31 sb-sf Exp $
*/
#include <iomacros.h>
#define __MSP430_HAS_WDT__
#define __MSP430_MPY32_BASE__ 0x140
#define __MSP430_HAS_PORT1_R__
#define __MSP430_HAS_PORT2_R__
#define __MSP430_HAS_PORT3_R__
#define __MSP430_HAS_PORT4_R__
#define __MSP430_HAS_PORT5_R__
#define __MSP430_HAS_PORT7_R__
#define __MSP430_HAS_PORT8_R__
#define __MSP430_HAS_PORT9_R__
#define __MSP430_HAS_PORT10_R__
#define __MSP430_HAS_PORTA__
#define __MSP430_HAS_PORTB__
#define __MSP430_HAS_FLLPLUS__
#define __MSP430_HAS_BT_RTC__
#define __MSP430_HAS_LCD_A__
#define __MSP430_HAS_USCI__
#define __MSP430_HAS_USCI1__
#define __MSP430_HAS_USCI_AB0__
#define __MSP430_HAS_USCI_AB1__
#define __MSP430_HAS_TA3__
#define __MSP430_HAS_TB3__
#define __MSP430_HAS_FLASH__
#define __MSP430_HAS_COMPA__
#define __MSP430_HAS_SVS__
#define __MSP430_HAS_SD16_A__
#define __MSP430_HAS_SD16_CH1__
#define __MSP430_HAS_SD16_CH2__
#if defined(__MSP430_4783__) || defined(__MSP430_4793__)
#define __MSP430_HAS_SD16_CH3__
#endif /* __MSP430_47x3__ */
#if defined(__MSP430_47166__) || defined(__MSP430_47176__) ||
defined(__MSP430_47186__) || defined(__MSP430_47196__)
#define __MSP430_HAS_SD16_CH3__
#define __MSP430_HAS_SD16_CH4__
#define __MSP430_HAS_SD16_CH5__
#endif
#if defined(__MSP430_47167__) || defined(__MSP430_47177__) ||
defined(__MSP430_47187__) || defined(__MSP430_47197__)
#define __MSP430_HAS_SD16_CH3__
#define __MSP430_HAS_SD16_CH4__
#define __MSP430_HAS_SD16_CH5__
#define __MSP430_HAS_SD16_CH6__
#endif
#if defined(__MSP430_4784__) || defined(__MSP430_4794__) \
|| defined(__MSP430_4783__) || defined(__MSP430_4793__)
#define __MSP430_SD16IV_BASE__ 0x110
#define __MSP430_SD16MEM_BASE__ 0x112
#elif defined(__MSP430_47166__) || defined(__MSP430_47176__) ||
defined(__MSP430_47186__) || defined(__MSP430_47196__) \
|| defined(__MSP430_47167__) || defined(__MSP430_47177__) ||
defined(__MSP430_47187__) || defined(__MSP430_47197__)
#define __MSP430_SD16IV_BASE__ 0x1AE
#define __MSP430_SD16MEM_BASE__ 0x110
#endif
#define __msp430_have_lcd_16_20
#define LCD_BASE 0x90
#include <msp430/basic_timer.h>
#include <msp430/system_clock.h>
#include <msp430/svs.h>
#include <msp430/lcd_a.h>
#include <msp430/flash.h>
#include <msp430/compa.h>
#include <msp430/timera.h>
#include <msp430/timerb.h>
#include <msp430/usci.h>
#include <msp430/gpio.h>
#include <msp430/mpy32.h>
#include <msp430/sd16.h>
#include <msp430/common.h>
#define IE1_ 0x0000 /* Interrupt Enable 1 */
sfrb(IE1,IE1_);
#define WDTIE (1<<0)
#define OFIE (1<<1)
#define NMIIE (1<<4)
#define ACCVIE (1<<5)
#define IFG1_ 0x0002 /* Interrupt Flag 1 */
sfrb(IFG1,IFG1_);
#define WDTIFG (1<<0)
#define OFIFG (1<<1)
#define NMIIFG (1<<4)
#define IE2_ 0x0001 /* Interrupt Enable 2 */
sfrb(IE2,IE2_);
#define UCA0RXIE (1<<0)
#define UCA0TXIE (1<<1)
#define UCB0RXIE (1<<2)
#define UCB0TXIE (1<<3)
#define BTIE (1<<7)
#define IFG2_ 0x0003 /* Interrupt Flag 2 */
sfrb(IFG2,IFG2_);
#define UCA0RXIFG (1<<0)
#define UCA0TXIFG (1<<1)
#define UCB0RXIFG (1<<2)
#define UCB0TXIFG (1<<3)
#define BTIFG (1<<7)
#if !defined(__MSP430X__)
/* __MSP430_47x3__, __MSP430_47x4__ */
#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer / RTC */
#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
#define USCIAB1TX_VECTOR 4 /* 0xFFE4 USCI A1/B1 Transmit */
#define USCIAB1RX_VECTOR 6 /* 0xFFE6 USCI A1/B1 Receive */
#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
#define TIMER0_A1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
#define TIMER0_A0_VECTOR 12 /* 0xFFEC Timer A CC0 */
#define SD16_VECTOR 14 /* 0xFFEE ADC */
#define USCIAB0TX_VECTOR 16 /* 0xFFF0 USCI A0/B0 Transmit */
#define USCIAB0RX_VECTOR 18 /* 0xFFF2 USCI A0/B0 Receive */
#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
#define TIMER0_B1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
#define TIMER0_B0_VECTOR 26 /* 0xFFFA Timer B CC0 */
#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
#else
/* __MSP430_471x6__, __MSP430_471x7__ */
#define DMA_VECTOR 30 /* 0xFFDE DMA */
#define BASICTIMER_VECTOR 32 /* 0xFFE0 Basic Timer / RTC */
#define PORT2_VECTOR 34 /* 0xFFE2 Port 2 */
#define USCIAB1TX_VECTOR 36 /* 0xFFE4 USCI A1/B1 Transmit */
#define USCIAB1RX_VECTOR 38 /* 0xFFE6 USCI A1/B1 Receive */
#define PORT1_VECTOR 40 /* 0xFFE8 Port 1 */
#define TIMER0_A1_VECTOR 42 /* 0xFFEA Timer A CC1-2, TA */
#define TIMER0_A0_VECTOR 44 /* 0xFFEC Timer A CC0 */
#define SD16_VECTOR 46 /* 0xFFEE ADC */
#define USCIAB0TX_VECTOR 48 /* 0xFFF0 USCI A0/B0 Transmit */
#define USCIAB0RX_VECTOR 50 /* 0xFFF2 USCI A0/B0 Receive */
#define WDT_VECTOR 52 /* 0xFFF4 Watchdog Timer */
#define COMPARATORA_VECTOR 54 /* 0xFFF6 Comparator A */
#define TIMER0_B1_VECTOR 56 /* 0xFFF8 Timer B CC1-2, TB */
#define TIMER0_B0_VECTOR 58 /* 0xFFFA Timer B CC0 */
#define NMI_VECTOR 60 /* 0xFFFC Non-maskable */
#endif
#define TIMERA1_VECTOR TIMER0_A1_VECTOR
#define TIMERA0_VECTOR TIMER0_A0_VECTOR
#define TIMERB1_VECTOR TIMER0_B1_VECTOR
#define TIMERB0_VECTOR TIMER0_B0_VECTOR
#endif /* #ifndef __msp430x47xx */
============== msp430-libc/include/msp430/gpio.h ==============
#include <msp430/iostructures.h>
#if !defined(__msp430_headers_gpio_h)
#define __msp430_headers_gpio_h
/* gpio.h
*
* mspgcc project: MSP430 device headers
* GPIO module header
*
* 2009-06-04 - THLN
* - for msp430x47xx
* - __MSP430_HAS_PORT9_R__ and __MSP430_HAS_PORT10_R__ added
*
* 2008-06-04 - TonyB ([email protected])
* - for msp430x2618 (and possibly others)
* - define __MSP430_HAS_PORT7_R__ and __MSP430_HAS_PORT7_R__
*
* (c) 2002 by M. P. Ashton <[email protected]>
* Originally based in part on work by Texas Instruments Inc.
*
* $Id: gpio.h,v 1.7 2008/06/16 23:22:19 cliechti Exp $
*/
/* Switches:
__MSP430_HAS_PORT0__ - if device has port 0
__MSP430_HAS_PORT1__ - if device has port 1
__MSP430_HAS_PORT1_R__ - if device has port 1 with pull-downs
__MSP430_HAS_PORT2__ - if device has port 2
__MSP430_HAS_PORT2_R__ - if device has port 2 with pull-downs
__MSP430_HAS_PORT3__ - if device has port 3
__MSP430_HAS_PORT3_R__ - if device has port 3 with pull-downs
__MSP430_HAS_PORT4__ - if device has port 4
__MSP430_HAS_PORT4_R__ - if device has port 4 with pull-downs
__MSP430_HAS_PORT5__ - if device has port 5
__MSP430_HAS_PORT5_R__ - if device has port 5 with pull-downs
__MSP430_HAS_PORT6__ - if device has port 6
__MSP430_HAS_PORT6_R__ - if device has port 6 with pull-downs
__MSP430_HAS_PORT7__ - if device has port 7
__MSP430_HAS_PORT7_R__ - if device has port 7 with pull-downs
__MSP430_HAS_PORT8__ - if device has port 8
__MSP430_HAS_PORT8_R__ - if device has port 8 with pull-downs
__MSP430_HAS_PORTA__ - if device has port A (16 bit view of ports
7 & 8)
__MSP430_HAS_PORT9__ - if device has port 9
__MSP430_HAS_PORT9_R__ - if device has port 9 with pull-downs
__MSP430_HAS_PORT10__ - if device has port 10
__MSP430_HAS_PORT10_R__ - if device has port 10 with pull-downs
__MSP430_HAS_PORTB__ - if device has port B (16 bit view of ports
9 & 10)
Note: these only make sense if the port itself is present. Also note that
the port resistor enable registers for ports 3-6 overlap with port 0
registers,
so any device that has these resistors will not have port 0.
*/
#if defined(__MSP430_HAS_PORT0__)
#define P0IN_ 0x0010 /* Port 0 Input */
sfrb(P0IN, P0IN_);
#define P0IN_0 0x01
#define P0IN_1 0x02
#define P0IN_2 0x04
#define P0IN_3 0x08
#define P0IN_4 0x10
#define P0IN_5 0x20
#define P0IN_6 0x40
#define P0IN_7 0x80
#define P0OUT_ 0x0011 /* Port 0 Output */
sfrb(P0OUT, P0OUT_);
#define P0OUT_0 0x01
#define P0OUT_1 0x02
#define P0OUT_2 0x04
#define P0OUT_3 0x08
#define P0OUT_4 0x10
#define P0OUT_5 0x20
#define P0OUT_6 0x40
#define P0OUT_7 0x80
#define P0DIR_ 0x0012 /* Port 0 Direction */
sfrb(P0DIR, P0DIR_);
#define P0DIR_0 0x01
#define P0DIR_1 0x02
#define P0DIR_2 0x04
#define P0DIR_3 0x08
#define P0DIR_4 0x10
#define P0DIR_5 0x20
#define P0DIR_6 0x40
#define P0DIR_7 0x80
#define P0IFG_ 0x0013 /* Port 0 Interrupt Flag */
sfrb(P0IFG, P0IFG_);
/* These two bits are defined in Interrupt Flag 1 */
/* #define P0IFG_0 0x01 */
/* #define P0IFG_1 0x02 */
#define P0IFG_2 0x04
#define P0IFG_3 0x08
#define P0IFG_4 0x10
#define P0IFG_5 0x20
#define P0IFG_6 0x40
#define P0IFG_7 0x80
#define P0IES_ 0x0014 /* Port 0 Interrupt Edge Select */
sfrb(P0IES, P0IES_);
#define P0IES_0 0x01
#define P0IES_1 0x02
#define P0IES_2 0x04
#define P0IES_3 0x08
#define P0IES_4 0x10
#define P0IES_5 0x20
#define P0IES_6 0x40
#define P0IES_7 0x80
#define P0IE_ 0x0015 /* Port 0 Interrupt Enable */
sfrb(P0IE, P0IE_);
/* These two bits are defined in Interrupt Enable 1 */
/* #define P0IE_0 0x01 */
/* #define P0IE_1 0x02 */
#define P0IE_2 0x04
#define P0IE_3 0x08
#define P0IE_4 0x10
#define P0IE_5 0x20
#define P0IE_6 0x40
#define P0IE_7 0x80
#endif
#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
#define P1IN_ 0x0020 /* Port 1 Input */
sfrb(P1IN, P1IN_);
#define P1OUT_ 0x0021 /* Port 1 Output */
sfrb(P1OUT, P1OUT_);
#define P1DIR_ 0x0022 /* Port 1 Direction */
sfrb(P1DIR, P1DIR_);
#define P1IFG_ 0x0023 /* Port 1 Interrupt Flag */
sfrb(P1IFG, P1IFG_);
#define P1IES_ 0x0024 /* Port 1 Interrupt Edge Select */
sfrb(P1IES, P1IES_);
#define P1IE_ 0x0025 /* Port 1 Interrupt Enable */
sfrb(P1IE, P1IE_);
#define P1SEL_ 0x0026 /* Port 1 Selection */
sfrb(P1SEL, P1SEL_);
#if defined(__MSP430_HAS_PORT1_R__)
#define P1REN_ 0x0027 /* Port 1 Resistor enable */
sfrb(P1REN, P1REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
#define P2IN_ 0x0028 /* Port 2 Input */
sfrb(P2IN, P2IN_);
#define P2OUT_ 0x0029 /* Port 2 Output */
sfrb(P2OUT, P2OUT_);
#define P2DIR_ 0x002A /* Port 2 Direction */
sfrb(P2DIR, P2DIR_);
#define P2IFG_ 0x002B /* Port 2 Interrupt Flag */
sfrb(P2IFG, P2IFG_);
#define P2IES_ 0x002C /* Port 2 Interrupt Edge Select */
sfrb(P2IES, P2IES_);
#define P2IE_ 0x002D /* Port 2 Interrupt Enable */
sfrb(P2IE, P2IE_);
#define P2SEL_ 0x002E /* Port 2 Selection */
sfrb(P2SEL, P2SEL_);
#if defined(__MSP430_HAS_PORT2_R__)
#define P2REN_ 0x002F /* Port 2 Resistor enable */
sfrb(P2REN, P2REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
#define P3IN_ 0x0018 /* Port 3 Input */
sfrb(P3IN, P3IN_);
#define P3OUT_ 0x0019 /* Port 3 Output */
sfrb(P3OUT, P3OUT_);
#define P3DIR_ 0x001A /* Port 3 Direction */
sfrb(P3DIR, P3DIR_);
#define P3SEL_ 0x001B /* Port 3 Selection */
sfrb(P3SEL, P3SEL_);
#if defined(__MSP430_HAS_PORT3_R__)
#define P3REN_ 0x0010 /* Port 3 Resistor enable */
sfrb(P3REN, P3REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
#define P4IN_ 0x001C /* Port 4 Input */
sfrb(P4IN, P4IN_);
#define P4OUT_ 0x001D /* Port 4 Output */
sfrb(P4OUT, P4OUT_);
#define P4DIR_ 0x001E /* Port 4 Direction */
sfrb(P4DIR, P4DIR_);
#define P4SEL_ 0x001F /* Port 4 Selection */
sfrb(P4SEL, P4SEL_);
#if defined(__MSP430_HAS_PORT4_R__)
#define P4REN_ 0x0011 /* Port 4 Resistor enable */
sfrb(P4REN, P4REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
#define P5IN_ 0x0030 /* Port 5 Input */
sfrb(P5IN, P5IN_);
#define P5OUT_ 0x0031 /* Port 5 Output */
sfrb(P5OUT, P5OUT_);
#define P5DIR_ 0x0032 /* Port 5 Direction */
sfrb(P5DIR, P5DIR_);
#define P5SEL_ 0x0033 /* Port 5 Selection */
sfrb(P5SEL, P5SEL_);
#if defined(__MSP430_HAS_PORT5_R__)
#define P5REN_ 0x0012 /* Port 5 Resistor enable */
sfrb(P5REN, P5REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
#define P6IN_ 0x0034 /* Port 6 Input */
sfrb(P6IN, P6IN_);
#define P6OUT_ 0x0035 /* Port 6 Output */
sfrb(P6OUT, P6OUT_);
#define P6DIR_ 0x0036 /* Port 6 Direction */
sfrb(P6DIR, P6DIR_);
#define P6SEL_ 0x0037 /* Port 6 Selection */
sfrb(P6SEL, P6SEL_);
#if defined(__MSP430_HAS_PORT6_R__)
#define P6REN_ 0x0013 /* Port 6 Resistor enable */
sfrb(P6REN, P6REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__)
#define P7IN_ 0x0038 /* Port 7 Input */
sfrb(P7IN, P7IN_);
#define P7OUT_ 0x003A /* Port 7 Output */
sfrb(P7OUT, P7OUT_);
#define P7DIR_ 0x003C /* Port 7 Direction */
sfrb(P7DIR, P7DIR_);
#define P7SEL_ 0x003E /* Port 7 Selection */
sfrb(P7SEL, P7SEL_);
#if defined(__MSP430_HAS_PORT7_R__)
#define P7REN_ 0x0014 /* Port 7 Resistor enable */
sfrb(P7REN, P7REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__)
#define P8IN_ 0x0039 /* Port 8 Input */
sfrb(P8IN, P8IN_);
#define P8OUT_ 0x003B /* Port 8 Output */
sfrb(P8OUT, P8OUT_);
#define P8DIR_ 0x003D /* Port 8 Direction */
sfrb(P8DIR, P8DIR_);
#define P8SEL_ 0x003F /* Port 8 Selection */
sfrb(P8SEL, P8SEL_);
#if defined(__MSP430_HAS_PORT8_R__)
#define P8REN_ 0x0015 /* Port 8 Resistor enable */
sfrb(P8REN, P8REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORTA__)
#define PAIN_ 0x0038 /* Port A Input */
sfrb(PAIN, PAIN_);
#endif
#if defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__)
#define P9IN_ 0x0008 /* Port 9 Input */
sfrb(P9IN, P9IN_);
#define P9OUT_ 0x000A /* Port 9 Output */
sfrb(P9OUT, P9OUT_);
#define P9DIR_ 0x000C /* Port 9 Direction */
sfrb(P9DIR, P9DIR_);
#define P9SEL_ 0x000E /* Port 9 Selection */
sfrb(P9SEL, P9SEL_);
#if defined(__MSP430_HAS_PORT9_R__)
#define P9REN_ 0x0016 /* Port 9 Resistor enable */
sfrb(P9REN, P9REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__)
#define P10IN_ 0x0009 /* Port 10 Input */
sfrb(P10IN, P10IN_);
#define P10OUT_ 0x000B /* Port 10 Output */
sfrb(P10OUT, P10OUT_);
#define P10DIR_ 0x000D /* Port 10 Direction */
sfrb(P10DIR, P10DIR_);
#define P10SEL_ 0x000F /* Port 10 Selection */
sfrb(P10SEL, P10SEL_);
#if defined(__MSP430_HAS_PORT10_R__)
#define P10REN_ 0x0017 /* Port 10 Resistor enable */
sfrb(P10REN, P10REN_);
#endif
#endif
#if defined(__MSP430_HAS_PORTB__)
#define PBIN_ 0x0008 /* Port B Input */
sfrb(PBIN, PBIN_);
#endif
#endif
