I don't if this bug has been already reported, I couldn't find a bug
report. So here goes:
The latest version of mspgcc3 (I built it on October 11) has a bug which
affects the ADC12 operation.
The specification says : The address space from 0100 to 01FFh is
reserved for 16-bit peripheral modules. These modules should be accessed
with word instructions. If byte instructions are used, only even
addresses are permissible, and the high byte of the result is always 0.
Thus byte reads at odd addresses are not permissible and the result is
unpredictable.
For the following ADC related function in TinyOS 2.1,
typedef struct __nesc_unnamed4254 {
volatile unsigned
adc12sc : 1,
enc : 1,
adc12tovie : 1,
adc12ovie : 1,
adc12on : 1,
refon : 1,
r2_5v : 1,
msc : 1,
sht0 : 4,
sht1 : 4;
} __attribute((packed)) adc12ctl0_t;
volatile unsigned int ADC12CTL0 __asm ("0x01A0");
static inline adc12ctl0_t getCtl0(void )
{
return * (adc12ctl0_t *)&ADC12CTL0;
}
The assembly produced at -O0 for msp430F1611 is
<getCtl0>:
push r5
push r4
clr r14
mov.b &0x01a0,r15
and.b #-1, r15 ;r3 As==11
and #-256, r14 ;#0xff00
bis r15, r14
mov.b &0x01a1,r15 /* A byte read at an odd address in the
peripheral address space is not permitted. */*
and.b #-1, r15 ;r3 As==11
swpb r15
and.b #-1, r14 ;r3 As==11
bis r15, r14
mov r14, r15
pop r4
pop r5
ret
This bug is present at all levels of optimization. Has anyone else run
into this bug as well?
Rohit
